SLLSET0C October   2016  – May 2017 TCAN1051-Q1 , TCAN1051G-Q1 , TCAN1051GV-Q1 , TCAN1051H-Q1 , TCAN1051HG-Q1 , TCAN1051HGV-Q1 , TCAN1051HV-Q1 , TCAN1051V-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configurations and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Power Rating
    6. 7.6 Electrical Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 TXD Dominant Timeout (DTO)
      2. 9.3.2 Thermal Shutdown (TSD)
      3. 9.3.3 Undervoltage Lockout
      4. 9.3.4 Unpowered Device
      5. 9.3.5 Floating Terminals
      6. 9.3.6 CAN Bus Short Circuit Current Limiting
      7. 9.3.7 Digital Inputs and Outputs
        1. 9.3.7.1 5-V VCC Only Devices (Devices without the "V" Suffix):
        2. 9.3.7.2 5 V VCC with VIO I/O Level Shifting (Devices with the "V" Suffix):
    4. 9.4 Device Functional Modes
      1. 9.4.1 CAN Bus States
      2. 9.4.2 Normal Mode
      3. 9.4.3 Silent Mode
      4. 9.4.4 Driver and Receiver Function Tables
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Bus Loading, Length and Number of Nodes
      2. 10.2.2 Detailed Design Procedures
        1. 10.2.2.1 CAN Termination
      3. 10.2.3 Application Curves
  11. 11Power Supply Requirements
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DRB|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Description

Overview

These CAN transceivers meet the ISO11898-2 (2016) High Speed CAN (Controller Area Network) physical layer standard. They are designed for data rates in excess of 1 Mbps for CAN FD and enhanced timing margin / higher data rates in long and highly-loaded networks. These devices provide many protection features to enhance device and CAN robustness.

Functional Block Diagram

TCAN1051-Q1 TCAN1051V-Q1 TCAN1051H-Q1 TCAN1051HV-Q1 TCAN1051G-Q1 TCAN1051GV-Q1 TCAN1051HG-Q1 TCAN1051HGV-Q1 fbd_TCAN1051_sllses8.gif

Feature Description

TXD Dominant Timeout (DTO)

During normal mode (the only mode where the CAN driver is active), the TXD DTO circuit prevents the transceiver from blocking network communication in the event of a hardware or software failure where TXD is held dominant longer than the timeout period tTXD_DTO. The DTO circuit timer starts on a falling edge on TXD. The DTO circuit disables the CAN bus driver if no rising edge is seen before the timeout period expires. This frees the bus for communication between other nodes on the network. The CAN driver is re-activated when a recessive signal is seen on the TXD terminal, thus clearing the TXD DTO condition. The receiver and RXD terminal still reflect activity on the CAN bus, and the bus terminals are biased to the recessive level during a TXD dominant timeout.

TCAN1051-Q1 TCAN1051V-Q1 TCAN1051H-Q1 TCAN1051HV-Q1 TCAN1051G-Q1 TCAN1051GV-Q1 TCAN1051HG-Q1 TCAN1051HGV-Q1 TXD_DTO_timing_sllses7.gif Figure 12. Example Timing Diagram for TXD DTO

NOTE

The minimum dominant TXD time allowed by the TXD DTO circuit limits the minimum possible transmitted data rate of the device. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst case, where five successive dominant bits are followed immediately by an error frame. This, along with the tTXD_DTO minimum, limits the minimum data rate. Calculate the minimum transmitted data rate by: Minimum Data Rate = 11 / tTXD_DTO.

Thermal Shutdown (TSD)

If the junction temperature of the device exceeds the thermal shutdown threshold (TTSD), the device turns off the CAN driver circuits thus blocking the TXD-to-bus transmission path. The CAN bus terminals are biased to the recessive level during a thermal shutdown, and the receiver-to-RXD path remains operational. The shutdown condition is cleared when the junction temperature drops at least the thermal shutdown hysteresis temperature (TTSD_HYS) below the thermal shutdown temperature (TTSD) of the device.

Undervoltage Lockout

The supply terminals have undervoltage detection that places the device in protected mode. This protects the bus during an undervoltage event on either the VCC or VIO supply terminals.

Table 2. Undervoltage Lockout 5 V Only Devices (Devices without the "V" Suffix)(1)

VCC DEVICE STATE BUS OUTPUT RXD
> UVVCC Normal Per TXD Mirrors Bus(2)
< UVVCC Protected High Impedance High Impedance
See the VIT section of the Electrical Characteristics.
Mirrors bus state: low if CAN bus is dominant, high if CAN bus is recessive.

Table 3. Undervoltage Lockout I/O Level Shifting Devices (Devices with the "V" Suffix)

VCC VIO DEVICE STATE BUS OUTPUT RXD
> UVVCC > UVVIO Normal Per TXD Mirrors Bus(1)
< UVVCC > UVVIO Protected High Impedance High (Recessive)
> UVVCC < UVVIO Protected High Impedance High Impedance
< UVVCC < UVVIO Protected High Impedance High Impedance
Mirrors bus state: low if CAN bus is dominant, high if CAN bus is recessive.

NOTE

After an undervoltage condition is cleared and the supplies have returned to valid levels, the device typically resumes normal operation within 50 µs.

Unpowered Device

The device is designed to be 'ideal passive' or 'no load' to the CAN bus if it is unpowered. The bus terminals (CANH, CANL) have extremely low leakage currents when the device is unpowered to avoid loading down the bus. This is critical if some nodes of the network are unpowered while the rest of the of network remains in operation. The logic terminals also have extremely low leakage currents when the device is unpowered to avoid loading down other circuits that may remain powered.

Floating Terminals

These devices have internal pull ups on critical terminals to place the device into known states if the terminals float. The TXD terminal is pulled up to VCC or VIO to force a recessive input level if the terminal floats. The S terminal is also pulled down to force the device into Normal mode if the terminal floats.

CAN Bus Short Circuit Current Limiting

The device has two protection features that limit the short circuit current when a CAN bus line is short-circuit fault condition: driver current limiting (both dominant and recessive states) and TXD dominant state time out to prevent permanent higher short circuit current of the dominant state during a system fault. During CAN communication the bus switches between dominant and recessive states, thus the short circuit current may be viewed either as the instantaneous current during each bus state or as an average current of the two states. For system current (power supply) and power considerations in the termination resistors and common-mode choke ratings, use the average short circuit current. Determine the ratio of dominant and recessive bits by the data in the CAN frame plus the following factors of the protocol and PHY that force either recessive or dominant at certain times:

  • Control fields with set bits
  • Bit stuffing
  • Interframe space
  • TXD dominant time out (fault case limiting)

These ensure a minimum recessive amount of time on the bus even if the data field contains a high percentage of dominant bits. The short circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short circuit currents. The average short circuit current may be calculated with the following formula:

Equation 1. IOS(AVG) = %Transmit × [(%REC_Bits × IOS(SS)_REC) + (%DOM_Bits × IOS(SS)_DOM)] + [%Receive × IOS(SS)_REC]

Where:

  • IOS(AVG) is the average short circuit current
  • %Transmit is the percentage the node is transmitting CAN messages
  • %Receive is the percentage the node is receiving CAN messages
  • %REC_Bits is the percentage of recessive bits in the transmitted CAN messages
  • %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages
  • IOS(SS)_REC is the recessive steady state short circuit current
  • IOS(SS)_DOM is the dominant steady state short circuit current

NOTE

Consider the short circuit current and possible fault cases of the network when sizing the power ratings of the termination resistance and other network components.

Digital Inputs and Outputs

5-V VCC Only Devices (Devices without the "V" Suffix):

The 5-V VCC only devices are supplied by a single 5-V rail. The digital inputs have TTL input thresholds and are therefore 5 V and 3.3 V compatible. The RXD outputs on these devices are driven to the VCC rail for logic high output. Additionally, the TXD pin is internally pulled up to VCC, and the S pin is pulled low to GND. The internal bias of the mode pins may only place the device into a known state if the terminals float, they may not be adequate for system-level biasing during transients or noisy enviroments.

NOTE

TXD pull up strength and CAN bit timing require special consideration when these devices are used with CAN controllers with an open-drain TXD output. An adequate external pull up resistor must be used to ensure that the CAN controller output of the micrcontroller maintains adequate bit timing to the TXD input.

5 V VCC with VIO I/O Level Shifting (Devices with the "V" Suffix):

These devices use a 5 V VCC power supply for the CAN driver and high speed receiver blocks. These transceivers have a second power supply for I/O level-shifting (VIO). This supply is used to set the CMOS input thresholds of the TXD and S pins and the RXD high level output voltage. Additionally, the TXD pin is internally pulled up to VIO, and the S pin is pulled low to GND.

Device Functional Modes

The device has two main operating modes: Normal mode and Silent mode. Operating mode selection is made via the S input terminal.

Table 4. Operating Modes

S Terminal MODE DRIVER RECEIVER RXD Terminal
LOW Normal Mode Enabled (ON) Enabled (ON) Mirrors Bus State(1)
HIGH Silent Mode Disabled (OFF) Enabled (ON) Mirrors Bus State(1)
Mirrors bus state: low if CAN bus is dominant, high if CAN bus is recessive.

CAN Bus States

The CAN bus has two states during powered operation of the device: dominant and recessive. A dominant bus state is when the bus is driven differentially, corresponding to a logic low on the TXD and RXD terminal. A recessive bus state is when the bus is biased to VCC / 2 via the high-resistance internal input resistors RIN of the receiver, corresponding to a logic high on the TXD and RXD terminals.

TCAN1051-Q1 TCAN1051V-Q1 TCAN1051H-Q1 TCAN1051HV-Q1 TCAN1051G-Q1 TCAN1051GV-Q1 TCAN1051HG-Q1 TCAN1051HGV-Q1 Bus_States_sllses7.gif Figure 13. Bus States (Physical Bit Representation)

Normal Mode

Select the Normal mode of device operation by setting S terminal low. The CAN driver and receiver are fully operational and CAN communication is bi-directional. The driver translates a digital input on TXD to a differential output on CANH and CANL. The receiver translates the differential signal from CANH and CANL to a digital output on RXD.

Silent Mode

Activate Silent mode by setting S terminal high. The CAN driver is disabled, preventing communication from the TXD pin to the CAN bus. The high speed receiver remains active so that CAN bus communication continues to be relayed to the RXD output pin.

Driver and Receiver Function Tables

Table 5. Driver Function Table

DEVICE INPUTS OUTPUTS DRIVEN BUS STATE
S (1) TXD(1) (2) CANH(1) CANL(1)
All Devices L or open L H L Dominant
H or Open Z Z Recessive
H X Z Z Recessive
H = high level, L = low level, X = irrelevant, Z = common mode (recessive) bias to VCC / 2. See Figure 13 and for bus state and common mode bias information.
Devices have an internal pull up to VCC or VIO on TXD terminal. If the TXD terminal is open the terminal will be pulled high and the transmitter will remain in recessive (non-driven) state.

Table 6. Receiver Function Table

DEVICE MODE CAN DIFFERENTIAL INPUTS
VID = VCANH – VCANL
BUS STATE RXD TERMINAL(1)
Normal or Silent VID ≥ VIT+(MAX) Dominant L(2)
VIT-(MIN) < VID < VIT+(MAX) ? ?(2)
VID ≤ VIT-(MIN) Recessive H(2)
Open (VID ≈ 0 V) Open H
H = high level, L = low level, ? = indeterminate.
See Receiver Electrical Characteristics section for input thresholds.