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All interrupts are for TCAN1146-Q1. Watchdog and CAN bus interrupts are for TCAN1144-Q1. Selective wake interrupts are for TCAN1145-Q1
The CRC_EEPROM interrupt is set when the internal EEPROM used for trimming has a CRC error. Upon power up the device loads an internal register from the EEPROM and performs a CRC check. If an error is present after eight attempts of loading valid data the CRC_EEPROM interrupt will be set. This will indicate an error that may impact device performance. This is repeated when the device leaves sleep mode or fail-safe mode due to a wake event. The device will perform a CRC check on the internal registers loaded from the EEPROM. If there is an error the device will reload the registers from the EEPROM. If there is a CRC error the device will attempt to load the internal registers up to eight times. After the eighth attempt the CRC_EEPROM interrupt flag will be set. This will indicate an error that may impact the device performance.
|7||SPIERR||R/W1C||0b||Sets when SPI status bit sets|
|6||SWERR||RH||0b||Logical OR of (SW_EN=1 and NOT(SWCFG)) and FRAME_OVF. Selective Wake may not be enabled while SWERR is set|
|5||FSM||R/W1C||0b||Entered fail-safe mode. Can be cleared while in fail-safe mode.|
|0||CRC_EEPROM||R/W1C||0b||EEPROM CRC error|