SLLSFF2A February   2022  – June 2022 TCAN1462-Q1 , TCAN1462V-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description Continued
  6. 6 Device Comparison Table
  7. 7 Pin Configurations and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  ESD Ratings, IEC Transients
    4. 8.4  Recommended Operating Conditions
    5. 8.5  Thermal Characteristics
    6. 8.6  Supply Characteristics
    7. 8.7  Dissipation Ratings
    8. 8.8  Electrical Characteristics
    9. 8.9  Switching Characteristics
    10. 8.10 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
      1. 10.1.1 Signal Improvement
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Pin Description
        1. 10.3.1.1 TXD
        2. 10.3.1.2 GND
        3. 10.3.1.3 VCC
        4. 10.3.1.4 RXD
        5. 10.3.1.5 VIO (only for TCAN1462V-Q1)
        6. 10.3.1.6 CANH and CANL
        7. 10.3.1.7 STB (Standby)
      2. 10.3.2 CAN Bus States
      3. 10.3.3 TXD Dominant Timeout (DTO)
      4. 10.3.4 CAN Bus Short-circuit Current Limiting
      5. 10.3.5 Thermal Shutdown (TSD)
      6. 10.3.6 Undervoltage Lockout
      7. 10.3.7 Unpowered Device
      8. 10.3.8 Floating pins
    4. 10.4 Device Functional Modes
      1. 10.4.1 Operating Modes
      2. 10.4.2 Normal Mode
      3. 10.4.3 Standby Mode
        1. 10.4.3.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
      4. 10.4.4 Driver and Receiver Function
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 CAN Termination
      2. 11.2.2 Detailed Design Procedures
        1. 11.2.2.1 Bus Loading, Length and Number of Nodes
      3. 11.2.3 Application Curves
    3. 11.3 System Examples
    4. 11.4 Power Supply Recommendations
    5. 11.5 Layout
      1. 11.5.1 Layout Guidelines
      2. 11.5.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.8 Electrical Characteristics

parameters valid over recommended operating conditions with -40℃ ≤ TJ ≤ 150℃ (Typical values are at VCC = 5 V, VIO = 3.3 V, Device ambient maintained at 27℃ ) unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver Electrical Characteristics
VO(DOM) Dominant output voltage normal mode CANH TXD = 0 V, STB = 0 V
50 Ω ≤ RL ≤ 65 Ω, CL = open,
See Figure 9-2 and Figure 10-5		 2.75 4.5 V
CANL 0.5 2.25 V
VO(REC) Recessive output voltage normal mode CANH and CANL TXD = VIO, STB = 0 V
RL = open (no load), CL = open,
See Figure 9-2 and Figure 10-5 		 2 0.5 VCC 3 V
VSYM Driver symmetry
(VO(CANH) + VO(CANL))/VCC		 TXD = 250 kHz, 1 MHz, 2.5 MHz, STB = 0 V
RL = 60, CSPLIT = 4.7 nF, CL = open,
See Figure 9-2 and Figure 11-2		 0.9 1.1 V/V
VSYM_DC DC output symmetry
(VCC - VO(CANH) - VO(CANL))		 STB = 0 V
RL = 60 Ω, CL = open,
See Figure 9-2 and Figure 10-5 		 –400 400 mV
RID(DOM) Differential input resistance in dominant phase TXD= 0 V, STB = 0 V, See Figure 10-2  40 Ω
RID(ACTIVE_REC) Differential input resistance in active recessive drive phase Duration from TXD low-to-high edge to elapse of active recessive drive period (tSIC_TX_base), See Figure 10-2  100 Ω
VOD(DOM) Differential output voltage normal mode
Dominant		 CANH - CANL TXD = 0 V, STB = 0 V
50 Ω ≤ RL ≤ 65 Ω, CL = open,
See Figure 9-2 and Figure 10-5  		 1.5 3 V
TXD = 0 V, STB = 0 V
45 Ω ≤ RL ≤ 70 Ω, CL = open,
See Figure 9-2 and Figure 10-5 		 1.4 3.3 V
TXD = 0 V, STB = 0 V
RL = 2240 Ω, CL = open,
See Figure 9-2 and Figure 10-5 		 1.5 5 V
VOD(REC) Differential output voltage normal mode
Recessive		 CANH - CANL TXD = VIO, STB = 0 V
RL = 60 Ω, CL = open,
See Figure 9-2 and Figure 10-5 		 –120 12 mV
TXD = VIO, STB = 0 V
RL = open, CL = open,
See Figure 9-2 and Figure 10-5 		 –50 50 mV
VO(STB) Bus output voltage standby mode CANH TXD = STB = VIO
RL = open , CL = open,
See Figure 9-2 and Figure 10-5  		 -0.1 0.1 V
CANL -0.1 0.1 V
CANH - CANL -0.2 0.2 V
IOS Short-circuit bus output current, TXD is dominant or recessive or toggling, normal mode V(CANH) = -15 V to 40 V, CANL = open, TXD = 0 V or VIO or 250 kHz, 2.5 MHz square wave, 
See Figure 9-7 and Figure 10-5  		 –115 115 mA
V(CAN_L) = -15 V to 40 V, CANH = open, TXD = 0 V or VIO or 250 kHz, 2.5 MHz square wave,
See Figure 9-7 and Figure 10-5  		 –115 115 mA
Receiver Electrical Characteristics
VIT Input threshold voltage normal mode  -12 V ≤ VCM ≤ 12 V, STB= 0 V,
See Figure 9-3 and Table 10-6		 500 900 mV
VIT(STB) Input threshold standby mode  -12 V ≤ VCM ≤ 12 V, STB= VIO ,
See Figure 9-3 and Table 10-6		 400 1150 mV
VDOM Normal mode dominant state differential input voltage range  -12 V ≤ VCM ≤ 12 V, STB= 0 V,
See Figure 9-3 and Table 10-6		 0.9 9 V
VREC Normal mode recessive state differential input voltage range -12 V ≤ VCM ≤ 12 V , STB= 0 V,
See Figure 9-3 and Table 10-6		 -4 0.5 V
VDOM(STB) Standby mode dominant state differential input voltage range STB = VIO, -12 V ≤ VCM ≤ 12 V,
See Figure 9-3 and Table 10-6		 1.15 9 V
VREC(STB) Standby mode recessive state differential input voltage range STB = VIO, -12 V ≤ VCM ≤ 12 V,
See Figure 9-3 and Table 10-6		 -4 0.4 V
VHYS Hysteresis voltage for input threshold normal mode  -12 V ≤ VCM ≤ 12 V, STB= 0 V,
See Figure 9-3 and Table 10-6		 100 mV
VCM Common mode range normal and standby modes See Figure 9-3 and Table 10-6 –12 12 V
ILKG(IOFF) Unpowered bus input leakage current CANH = CANL = 5 V,  VCC = VIO = GND 5 µA
CI Input capacitance to ground (CANH or CANL) TXD = VIO   40 pF
CID Differential input capacitance 20 pF
RID Differential input resistance TXD = VIO, STB = 0 V -12 V ≤ VCM ≤ 12 V, Delta V/Delta I 40 90 kΩ
RIN Single ended input resistance
(CANH or CANL)		 20 45 kΩ
RIN(M) Input resistance matching
[1 – (RIN(CANH) / RIN(CANL))] × 100 %		 V(CAN_H) = V(CAN_L) = 5 V –1 1 %
TXD Terminal (CAN Transmit Data Input)
VIH High-level input voltage Devices without VIO 0.7 VCC V
VIH High-level input voltage Devices with VIO 0.7 VIO V
VIL Low-level input voltage Devices without VIO 0.3 VCC V
VIL Low-level input voltage Devices with VIO 0.3 VIO V
IIH High-level input leakage current TXD = VCC = VIO = 5.5 V –2.5 0 1 µA
IIL Low-level input leakage current TXD = 0 V, VCC = VIO = 5.5 V –200 -100 –20 µA
ILKG(OFF) Unpowered leakage current TXD = 5.5 V, VCC = VIO = 0 V –1 0 1 µA
CI Input capacitance VIN = 0.4×sin(2×π×2×106×t)+2.5 V 5 pF
RXD Terminal (CAN Receive Data Output)
VOH High-level output voltage Devices without VIO
IO = –1.5 mA,
See Figure 9-3		 0.8 VCC V
VOH High-level output voltage IO = –1.5 mA, Devices with VIO
See Figure 9-3		 0.8 VIO   V
VOL Low-level output voltage Devices without VIO
IO = 1.5 mA,
See Figure 9-3		 0.2 VCC V
VOL Low-level output voltage Devices with VIO
IO = 1.5 mA, Devices with VIO
See Figure 9-3		   0.2 VIO V
ILKG(OFF) Unpowered leakage current RXD = 5.5 V, VCC = VIO = 0 V –1 0 1 µA
 STB Terminal (Standby Mode Input)
VIH High-level input voltage Devices without VIO 0.7 VCC V
VIH High-level input voltage Devices with VIO 0.7 VIO V
VIL Low-level input voltage Devices without VIO 0.3 VCC V
VIL Low-level input voltage Devices with VIO 0.3 VIO V
IIH High-level input leakage current  VCC = VIO = STB = 5.5 V –2 2 µA
IIL Low-level input leakage current  VCC = VIO = 5.5 V, STB = 0 V –20 –2 µA
ILKG(OFF) Unpowered leakage current STB = 5.5V, VCC= VIO = 0 V –1 0 1 µA