SBOSA39A April   2025  – October 2025 THS3470

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics ±VS = ±30V
    6. 5.6 Electrical Characteristics ±VS = ±20V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Current Limit
      2. 6.3.2 Output Current Enable
      3. 6.3.3 Over Temperature Flag
      4. 6.3.4 Output Current Flags
      5. 6.3.5 Output Current Monitoring
      6. 6.3.6 Die Temperature Monitoring
      7. 6.3.7 External Compensation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power Modes
      2. 6.4.2 Choosing a Feedback Resistor
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 High-Voltage, High-Precision, Composite Amplifier
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 120V Bootstrap Amplifier
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Performance Plots
    3. 7.3 Short Circuit Protection
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Thermal Considerations
        1. 7.5.1.1 Top-Side Cooling Benefits
        2. 7.5.1.2 THS3470 Safe Operating Area
      2. 7.5.2 Layout Guidelines
      3. 7.5.3 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 TAPE AND REEL INFORMATION

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • REB|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Electrical Characteristics ±VS = ±20V

at TJ ≅ 25°C, AV = –5V/V, RF = 1.21kΩ, RS = 5Ω, and CL = 300pF connected to midsupply (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
SSBW Small-signal bandwidth
(–3dB)		 VO = 2VPP 55 MHz
AV = 2V/V 70
LSBW Large-signal bandwidth
(–3dB)		 VO = 20VPP(2) 45 MHz
SR Slew rate (peak) VO = 30V step, AV = 2V/V 3500 V/µs
Slew rate (20%–80%) VO = 30V step, AV = 2V/V 3000
Rise and fall time VO = 30V step, AV = 2V/V 9 ns
Settling time To 0.1%, VO = 10V step 150 ns
HD2 2nd-harmonic distortion VO = 20VPP,
AV = –10V/V		 f = 30MHz –43 dBc
f = 1MHz –90
f = 0.1MHz –105
VO = 20VPP,
AV = –10V/V, RL = 25Ω		 f = 30MHz –46
f = 1MHz –95
f = 0.1MHz –91
HD3 3rd-harmonic distortion VO = 20VPP,
AV = –10V/V		 f = 30MHz –34 dBc
f = 1MHz –79
f = 0.1MHz –86
VO = 20VPP,
AV = –10V/V, RL = 25Ω		 f = 30MHz –33
f = 1MHz –80
f = 0.1MHz –86
en Voltage noise f > 100kHz 1.3 nV/√Hz
in+ Noninverting input-referred current noise f > 100kHz 31 pA/√Hz
in– Inverting input-referred current noise f > 100kHz 20 pA/√Hz
VOS Input offset voltage ±0.8 ±3.5 mV
Input offset voltage drift(1) TJ = –40°C to +125°C 5 µV/°C
DC PERFORMANCE
IB– Inverting input bias current ±3 ±25 µA
Inverting input bias current drift TJ = –40°C to +125°C 100 nA/°C
IB+ Noninverting input bias current ±1 ±15 µA
Noninverting input bias current drift TJ = –40°C to +125°C 70 nA/°C
ZOL Open-loop transimpedance gain VO = ±10V 5.5 MΩ
INPUT
ZIN+ Noninverting input impedance 180 || 5 kΩ || pF
ZIN– Inverting input impedance 17 Ω
Input common-mode voltage VEE + 4 VCC – 4 V
CMRR Common-mode rejection ratio f = dc, VICM = ±2V 67 dB
f = dc, VICM = ±18V 72
OUTPUT
HROUT Headroom to either supply RL = open ±4 ±5 V
RL = 100Ω ±4 ±5 V
IOUTLIN Linear output current 1 1.2 A
IOUT Maximum current output 1.5 A
ZOUT DC output impedance Closed-loop 0.03 Ω
POWER SUPPLY
IQ Quiescent current Full bias, no load,
ISNK/ISRC_LIMIT = open		 31 32 mA
TJ = –40°C to +125°C 31 33
Full bias, no load,
ISNK/ISRC_LIMIT = 200mA		 29 30
TJ = –40°C to +125°C 29 31
Full bias, no load,
ISNK/ISRC_LIMIT = 1.5A		 33 34
TJ = –40°C to +125°C 33 34
Power down, no load,
ISNK/ISRC_LIMIT = open		 14 16
TJ = –40°C to +125°C 14 16
OUTPUT CURRENT MONITORING
IOUT_MONITOR accuracy IOUT = ±200mA 5 %
IOUT = ±1A 15
CURRENT LIMIT MANAGEMENT
Current limit accuracy ILIMIT = ±200mA 5 %
ILIMIT = ±1A 5
(1) Current output based on electromigration limit, actual performance depends on system thermals.
(2) High capacitive load values, like 300pF, limit the bandwidth due to large output current transients.