SBOS778D April 2016 – April 2021 THS4551
The bandwidth is controlled to 88 kHz by using the 2.4-nF feedback capacitors. Amplifier stability is controlled by the 20-nF differential capacitor across the DAC outputs. The added 4.4 Ω in series with the feedback 2.2-nF capacitor isolates this capacitance from the inductive open-loop output impedance. To observe the effect of adding these small resistors in series with the feedback capacitors, use the TINA-TI™ loop gain simulation circuit. Include the DAC source capacitance in any final design analysis. Running the frequency response for this circuit (available as a TINA-TI™ simulation file) provides this result. The 63.5-dBΩ gain is the 1.5-kΩ transimpedance gain provided in this design.
Running a full-scale sine wave at 1 kHz with ±1.95 mA on each output from the DAC at 180° out of phase, and probing each THS4551 output pin separately results in the expected ±1.46 V on each output pin, as shown in Figure 10-16. More output swing is available for the RRO device using the ±2.5-V supplies provided by the LM27762 by simply increasing the feedback resistor values.
Although this example is on the audio signal generation side, the THS4551 can also be used to convert a single-ended line input to a differential driver into an audio ADC.