SLOS080T September   1978  – December 2021 TL071 , TL071A , TL071B , TL071H , TL072 , TL072A , TL072B , TL072H , TL072M , TL074 , TL074A , TL074B , TL074H , TL074M

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings: TL07xH
    2. 6.2  Absolute Maximum Ratings: All Devices Except TL07xH
    3. 6.3  ESD Ratings: TL07xH
    4. 6.4  ESD Ratings: All Devices Except TL07xH
    5. 6.5  Recommended Operating Conditions: TL07xH
    6. 6.6  Recommended Operating Conditions: All Devices Except TL07xH
    7. 6.7  Thermal Information for Single Channel: TL071H
    8. 6.8  Thermal Information: TL071x
    9. 6.9  Thermal Information for Dual Channel: TL072H
    10. 6.10 Thermal Information: TL072x
    11. 6.11 Thermal Information: TL072x (cont.)
    12. 6.12 Thermal Information for Quad Channel: TL074H
    13. 6.13 Thermal Information: TL074x
    14. 6.14 Thermal Information: TL074x (cont).
    15. 6.15 Thermal Information: TL074x (cont).
    16. 6.16 Thermal Information
    17. 6.17 Electrical Characteristics: TL07xH
    18. 6.18 Electrical Characteristics: TL071C, TL072C, TL074C
    19. 6.19 Electrical Characteristics: TL071AC, TL072AC, TL074AC
    20. 6.20 Electrical Characteristics: TL071BC, TL072BC, TL074BC
    21. 6.21 Electrical Characteristics: TL071I, TL072I, TL074I
    22. 6.22 Electrical Characteristics: TL071M, TL072M
    23. 6.23 Electrical Characteristics: TL074M
    24. 6.24 Switching Characteristics: TL07xM
    25. 6.25 Switching Characteristics: TL07xC, TL07xAC, TL07xBC, TL07xI
    26. 6.26 Typical Characteristics: TL07xH
    27. 6.27 Typical Characteristics: All Devices Except TL07xH
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Total Harmonic Distortion
      2. 8.3.2 Slew Rate
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Unity Gain Buffer
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curves
    4. 9.4 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
  • PS|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics: TL07xH

at TA = 25°C, VS = 40 V ( ±20 V), VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 20 pF (unless otherwise noted)

TA = 25°C
Figure 6-1 Offset Voltage Production Distribution
VCM = VS / 2
Figure 6-3 Offset Voltage vs Temperature
TA = 125°C
Figure 6-5 Offset Voltage vs Common-Mode Voltage
Figure 6-7 Offset Voltage vs Power Supply
Figure 6-9 Closed-Loop Gain vs Frequency
Figure 6-11 Input Bias Current vs Temperature
Figure 6-13 Output Voltage Swing vs Output Current (Sinking)
f = 0 Hz
Figure 6-15 CMRR vs Temperature (dB)
Figure 6-17 0.1-Hz to 10-Hz Noise
BW = 80 kHz, VOUT = 1 VRMS
Figure 6-19 THD+N Ratio vs Frequency
VCM = VS / 2
Figure 6-21 Quiescent Current vs Supply Voltage
Figure 6-23 Open-Loop Voltage Gain vs Temperature (dB)
G = –1, 25-mV output step
Figure 6-25 Small-Signal Overshoot vs Capacitive Load
 
Figure 6-27 Phase Margin vs Capacitive Load
G = –10
Figure 6-29 Positive Overload Recovery
CL = 20 pF, G = 1, 10-mV step response
Figure 6-31 Small-Signal Step Response, Rising
CL = 20 pF, G = 1
Figure 6-33 Large-Signal Step Response (Rising)
CL = 20 pF, G = 1
Figure 6-35 Large-Signal Step Response
Figure 6-37 Maximum Output Voltage vs Frequency
Figure 6-39 EMIRR (Electromagnetic Interference Rejection Ratio) vs Frequency
 
Figure 6-2 Offset Voltage Drift Distribution
TA = 25°C
Figure 6-4 Offset Voltage vs Common-Mode Voltage
TA = –40°C
Figure 6-6 Offset Voltage vs Common-Mode Voltage
Figure 6-8 Open-Loop Gain and Phase vs Frequency
Figure 6-10 Input Bias Current vs Common-Mode Voltage
Figure 6-12 Output Voltage Swing vs Output Current (Sourcing)
Figure 6-14 CMRR and PSRR vs Frequency
f = 0 Hz
Figure 6-16 PSRR vs Temperature (dB)
Figure 6-18 Input Voltage Noise Spectral Density vs Frequency
BW = 80 kHz, f = 1 kHz
Figure 6-20 THD+N vs Output Amplitude
 
Figure 6-22 Quiescent Current vs Temperature
Figure 6-24 Open-Loop Output Impedance vs Frequency
G = 1, 10-mV output step
Figure 6-26 Small-Signal Overshoot vs Capacitive Load
VS = ±10 V, VIN = VOUT
Figure 6-28 No Phase Reversal
G = –10
Figure 6-30 Negative Overload Recovery
CL = 20 pF, G = 1, 10-mV step response
Figure 6-32 Small-Signal Step Response, Falling
CL = 20 pF, G = 1
Figure 6-34 Large-Signal Step Response (Falling)
 
Figure 6-36 Short-Circuit Current vs Temperature
Figure 6-38 Channel Separation vs Frequency