SLVS074I January 1983 – July 2022 TL494
The comparator also provides modulation control of the output pulse width. For this, the ramp voltage across timing capacitor CT is compared to the control signal present at the output of the error amplifiers. The timing capacitor input incorporates a series diode that is omitted from the control signal input. This requires the control signal (error amplifier output) to be ∼0.7 V greater than the voltage across CT to inhibit the output logic, and ensures maximum duty cycle operation without requiring the control voltage to sink to a true ground potential. The output pulse width varies from 97% of the period to 0 as the voltage present at the error amplifier output varies from 0.5 V to 3.5 V, respectively.