SLVS074I January   1983  – July 2022 TL494

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Simplified Block Diagram
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics, Reference Section
    6. 7.6  Electrical Characteristics, Oscillator Section
    7. 7.7  Electrical Characteristics, Error-Amplifier Section
    8. 7.8  Electrical Characteristics, Output Section
    9. 7.9  Electrical Characteristics, Dead-Time Control Section
    10. 7.10 Electrical Characteristics, PWM Comparator Section
    11. 7.11 Electrical Characteristics, Total Device
    12. 7.12 Switching Characteristics
    13. 7.13 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 5-V Reference Regulator
      2. 9.3.2 Oscillator
      3. 9.3.3 Dead-time Control
      4. 9.3.4 Comparator
      5. 9.3.5 Pulse-Width Modulation (PWM)
      6. 9.3.6 Error Amplifiers
      7. 9.3.7 Output-Control Input
      8. 9.3.8 Output Transistors
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Input Power Source
        2. 10.2.2.2 Control Circuits
          1. 10.2.2.2.1 Oscillator
          2. 10.2.2.2.2 Error Amplifier
          3. 10.2.2.2.3 Current-Limiting Amplifier
          4. 10.2.2.2.4 Soft Start and Dead Time
        3. 10.2.2.3 Inductor Calculations
        4. 10.2.2.4 Output Capacitance Calculations
        5. 10.2.2.5 Transistor Power-Switch Calculations
      3. 10.2.3 Application Curves for Output Characteristics
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Feedback Traces
      2. 12.1.2 Input/Output Capacitors
      3. 12.1.3 Compensation Components
      4. 12.1.4 Traces and Ground Planes
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Error Amplifiers

Both high-gain error amplifiers receive their bias from the VI supply rail. This permits a common-mode input voltage range from –0.3 V to 2 V less than VI. Both amplifiers behave characteristically of a single-ended single-supply amplifier, in that each output is active high only. This allows each amplifier to pull up independently for a decreasing output pulse-width demand. With both outputs ORed together at the inverting input node of the PWM comparator, the amplifier demanding the minimum pulse out dominates. The amplifier outputs are biased low by a current sink to provide maximum pulse width out when both amplifiers are biased off.