SLFS043I September   1983  – July 2019 TLC555

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions: D, P, PS, and JG Packages
    2.     Pin Functions: PW and FK
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics: VDD = 2 V for TLC555C, VDD = 3 V for TLC555I
    5. 6.5 Electrical Characteristics: VDD = 5 V
    6. 6.6 Electrical Characteristics: VDD = 15 V
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Monostable Operation
      2. 7.3.2 Astable Operation
      3. 7.3.3 Frequency Divider
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Missing-Pulse Detector
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Pulse-Width Modulation
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Pulse-Position Modulation
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
      4. 8.2.4 Sequential Timer
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curve
      5. 8.2.5 Designing for Improved ESD Performance
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

D, P, PS, and JG Packages
8-Pin SOIC, PDIP, SOP, CDIP
Top View
TLC555 po_8pin_lfs043.gif

Pin Functions: D, P, PS, and JG Packages

PIN I/O DESCRIPTION
NAME SOIC, PDIP,
SOP, CDIP
CONT 5 I Controls comparator thresholds. Outputs 2/3 VDD and allows bypass capacitor connection.
DISCH 7 O Open collector output to discharge timing capacitor.
GND 1 Ground.
NC No internal connection.
OUT 3 O High current timer output signal.
RESET 4 I Active low reset input forces output and discharge low.
THRES 6 I End of timing input. THRES > CONT sets output low and discharge low.
TRIG 2 I Start of timing input. TRIG < 1/2 CONT sets output high and discharge open.
VDD 8 Power-supply voltage.
PW Package
14-Pin TSSOP
Top View
TLC555 po_14pin_lfs043.gif
FK Package
20-Pin LCCC
Top View
TLC555 po_20pin_lfs043.gif

Pin Functions: PW and FK

PIN I/O DESCRIPTION
NAME TSSOP LCCC
CONT 8 12 I Controls comparator thresholds. Outputs 2/3 VDD and allows bypass capacitor connection.
DISCH 12 17 O Open-collector output to discharge timing capacitor.
GND 1 2 Ground.
NC 2, 4, 6,
9, 11, 13
1, 3, 4, 6, 8,
9, 11, 13, 14, 16, 18, 19
No internal connection.
OUT 5 7 O High current timer output signal.
RESET 7 10 I Active low reset input forces output and discharge low.
THRES 10 15 I End of timing input. THRES > CONT sets output low and discharge low.
TRIG 3 5 I Start of timing input. TRIG < 1/2 CONT sets output high and discharge open.
VDD 14 20 Power-supply voltage.