SGLS199C January   2004  – July 2025 TLE2021-Q1 , TLE2021A-Q1 , TLE2022-Q1 , TLE2022A-Q1 , TLE2024-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Recommended Operating Conditions
    3. 5.3  Thermal Information for TLE2021-Q1
    4. 5.4  Thermal Information for TLE2022-Q1
    5. 5.5  Thermal Information for TLE2024-Q1
    6. 5.6  Electrical Characteristics for TLE2021-Q1, VCC = ±15V
    7. 5.7  Electrical Characteristics for TLE2021-Q1, VCC = 5V
    8. 5.8  Electrical Characteristics for TLE2022-Q1, VCC = ±15V
    9. 5.9  Electrical Characteristics for TLE2022-Q1, VCC = 5V
    10. 5.10 Electrical Characteristics for TLE2024-Q1, VCC = ±15V
    11. 5.11 Electrical Characteristics for TLE2024-Q1, VCC = 5V
    12. 5.12 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Voltage-Follower Applications
      2. 6.1.2 Input Offset Voltage Null
    2. 6.2 Layout
      1. 6.2.1 Layout Guidelines
      2. 6.2.2 Layout Example
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

Figure 4-1 TLE2021-Q1: D Package, 8-Pin SOIC, (Top View)
Table 4-1 Pin Functions: TLE2021-Q1
PIN TYPE DESCRIPTION
NAME NO.
–IN 2 Input Inverting input
+IN 3 Input Noninverting input
NC 8 — No connection. Float this pin.
OFFSET N1 1 _ External input offset voltage adjustment
OFFSET N2 2 _ External input offset voltage adjustment
OUT 6 Output Output
V– 4 Power Negative (lowest) power supply
V+ 7 Power Positive (highest) power supply
Figure 4-2 TLE2022-Q1: D Package, 8-Pin SOIC (Top View)
Table 4-2 Pin Functions: TLE2022-Q1
PIN TYPE DESCRIPTION
NAME NO.
–IN A 2 Input Inverting input channel A
–IN B 6 Input Inverting input channel B
+IN A 3 Input Noninverting input channel A
+IN B 5 Input Noninverting input channel B
NC — — No connection. Float this pin.
OUT A 1 Output Output channel A
OUT B 7 Output Output channel B
V– 4 Power Negative supply
V+ 8 Power Positive supply
Figure 4-3 TLE2024-Q1: DW Package, 16-Pin SOIC (Top View)
Table 4-3 Pin Functions: TLE2024-Q1
PIN TYPE DESCRIPTION
NAME NO.
–IN A 2 Input Inverting input channel A
–IN B 6 Input Inverting input channel B
–IN C 11 Input Inverting input channel C
–IN D 15 Input Inverting input channel D
+IN A 3 Input Noninverting input channel A
+IN B 5 Input Noninverting input channel B
+IN C 12 Input Noninverting input channel C
+IN D 14 Input Noninverting input channel D
NC 8, 9 — No internal connection. Float this pin.
OUT A 1 Output Output channel A
OUT B 7 Output Output channel B
OUT C 10 Output Output channel C
OUT D 16 Output Output channel D
V– 13 Power Negative supply
V+ 4 Power Positive supply