SLVS561L December   2004  – October 2014 TLV1117

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Handling Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 TLV1117C Electrical Characteristics
    4. 6.4 TLV1117I Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 NPN Output Drive
      2. 7.3.2 Overload Block
      3. 7.3.3 Programmable Feedback
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal operation
      2. 7.4.2 Operation With Low Input Voltage
      3. 7.4.3 Operation at Light Loads
      4. 7.4.4 Operation in Self Protection
  8. Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
      3. 8.1.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • KVU|3
  • DRJ|8
  • DCY|4
  • KCS|3
  • KCT|3
  • KTT|3
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Typical Application

ai_adj_reg_lvs561.gifFigure 9. Basic Adjustable Regulator

The adjustable version of the TLV1117 will take a 2.7 to 15-V input. The voltage VREF refers to the voltage between the output and the ADJUST pin, typically 1.25 V. The VREF voltage causes a current to flow across R1, which is the same current that will flow across R2 (minus the negligible 50-µA IADJ). Therefore, R2 can be adjusted to create a larger voltage drop from GND and set the output voltage. The output voltage equation is described in Detailed Design Procedure.

8.1.1 Design Requirements

  • (A) Output capacitor selection is critical for regulator stability. Larger COUT values benefit the regulator by improving transient response and loop stability. This device is designed to be stable with tantalum and aluminum electrolytic output capacitors having an ESR between 0.2 Ω and 10 Ω.
  • (B) CADJ can be used to improve ripple rejection. If CADJ is used, a COUT that is larger in value than CADJ must be used.
  • (C) CIN is recommended if TLV1117 device is not located near the power-supply filter.
  • (D) An external diode is recommended to protect the regulator if the input instantaneously is shorted to GND.

8.1.2 Detailed Design Procedure

The output voltage can be calculated as shown in Figure 10:

tlv1117appequation.gifFigure 10.

IADJ can be neglected in most applications because its value is approximately 80 µA.

8.1.3 Application Curves

g_dropout_lvs561.gifFigure 11. Dropout Voltage vs Load Current