SLVS561L December 2004 – October 2014 TLV1117
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The adjustable version of the TLV1117 will take a 2.7 to 15-V input. The voltage VREF refers to the voltage between the output and the ADJUST pin, typically 1.25 V. The VREF voltage causes a current to flow across R1, which is the same current that will flow across R2 (minus the negligible 50-µA IADJ). Therefore, R2 can be adjusted to create a larger voltage drop from GND and set the output voltage. The output voltage equation is described in Detailed Design Procedure.
The output voltage can be calculated as shown in Figure 10:
IADJ can be neglected in most applications because its value is approximately 80 µA.