SBASA91A December 2020 – June 2021 TLV320ADC3120
As shown in Figure 8-69, a single-byte data read transfer begins with the master device transmitting a start condition followed by the I2C slave address and the read/write bit. For the data read transfer, both a write followed by a read are done. Initially, a write is done to transfer the address byte of the internal register address to be read. As a result, the read/write bit is set to 0.
After receiving the slave address and the read/write bit, the device responds with an acknowledge bit (ACK). The master device then sends the internal register address byte, after which the device issues an acknowledge bit (ACK). The master device transmits another start condition followed by the slave address and the read/write bit again. This time, the read/write bit is set to 1, indicating a read transfer. Next, the device transmits the data byte from the register address being read. After receiving the data byte, the master device transmits a not-acknowledge (NACK) followed by a stop condition to complete the single-byte data read transfer.