SNOSDA2E
august 2020 – july 2023
TLV3604
,
TLV3605
,
TLV3607
PRODMIX
1
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
Pin Configurations: TLV3604 and TLV3605
5.1
Pin Configuration: TLV3607
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics (VCCI = VCCO = 2.5 V to 5 V)
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
7.4.1
Rail-to-Rail Inputs
7.4.2
LVDS Output
8
Application and Implementation
8.1
Application Information
8.1.1
Comparator Inputs
8.1.2
Capacitive Loads
8.1.3
Latch Functionality
8.1.4
Adjustable Hysteresis
8.2
Typical Application
8.2.1
Non-Inverting Comparator With Hysteresis
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Performance Plots
8.2.2
Optical Receiver
8.2.3
Logic Clock Source to LVDS Transceiver
8.2.4
External Trigger Function for Oscilloscopes
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Development Support
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RVK|12
MPQF280A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snosda2e_oa
snosda2e_pm
1
Features
Low propagation delay: 800 ps
Low overdrive dispersion: 350 ps
Quiescent current: 12.1 mA
High toggle frequency: 1.5 GHz / 3.0 Gbps
Narrow pulse width detection capability: 600 ps
LVDS output
Supply range: 2.4 V to 5.5 V
Input common-mode range extends 200 mV beyond both rails
Low input offset voltage: ±5 mV
Single and dual channel options