SNVSB04B March   2019  – June 2020 TLV4021 , TLV4031 , TLV4041 , TLV4051

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      TLV40x1 Configurations
  4. Revision History
  5. Pin Configuration and Functions
    1.     DSBGA Package Pin Functions
    2.     SOT-23 Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power ON Reset (POR)
      2. 7.4.2 Input (IN)
      3. 7.4.3 Switching Thresholds and Hysteresis (VHYS)
      4. 7.4.4 Output (OUT)
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Monitoring (V+)
      2. 8.1.2 Monitoring a Voltage Other than (V+)
      3. 8.1.3 VPULLUP to a Voltage Other than (V+)
    2. 8.2 Typical Application
      1. 8.2.1 Under-Voltage Detection
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Additional Application Information
        1. 8.2.2.1 Pull-up Resistor Selection
        2. 8.2.2.2 Input Supply Capacitor
        3. 8.2.2.3 Sense Capacitor
    3. 8.3 What to Do and What Not to Do
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

YKA Package
4-Bump DSBGA
Top View
TLV4021 TLV4031 TLV4041 TLV4051 tlv7081-pin-diagram-01-snosd69.gif

DSBGA Package Pin Functions

PIN I/O DESCRIPTION
NAME NUMBER
OUT A1 O Comparator output: OUT is push-pull on TLV4041/4051 and open-drain on TLV4021/4031
V+ B1 P Positive (highest) power supply
V– B2 P Negative (lowest) power supply
IN A2 I Comparator input: IN is non-Inverting on TLV4021/4041 and inverting on TLV4031/4051
SOT-23 Package
5-pin
Top View
TLV4021 TLV4031 TLV4041 TLV4051 tlv40x1_pinout.gif

SOT-23 Pin Functions

PIN I/O DESCRIPTION
NAME NUMBER
V+ 1 P Positive (highest) power supply
V– 2 P Negative (lowest) power supply
NC 3 x No connect; this pin is not internally connected to the die. It can be grounded if that is preferred in the system.
IN 4 I Comparator input: IN is inverting on TLV4051
OUT 5 O Comparator output: OUT is push-pull