SNVSB04B March   2019  – June 2020 TLV4021 , TLV4031 , TLV4041 , TLV4051

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      TLV40x1 Configurations
  4. Revision History
  5. Pin Configuration and Functions
    1.     DSBGA Package Pin Functions
    2.     SOT-23 Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power ON Reset (POR)
      2. 7.4.2 Input (IN)
      3. 7.4.3 Switching Thresholds and Hysteresis (VHYS)
      4. 7.4.4 Output (OUT)
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Monitoring (V+)
      2. 8.1.2 Monitoring a Voltage Other than (V+)
      3. 8.1.3 VPULLUP to a Voltage Other than (V+)
    2. 8.2 Typical Application
      1. 8.2.1 Under-Voltage Detection
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Additional Application Information
        1. 8.2.2.1 Pull-up Resistor Selection
        2. 8.2.2.2 Input Supply Capacitor
        3. 8.2.2.3 Sense Capacitor
    3. 8.3 What to Do and What Not to Do
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power ON Reset (POR)

The TLV40x1 comparators have a Power-on-Reset (POR) circuit which provides system designers a known start-up condition for the output of the comparators. When the power supply (VS) is ramping up or ramping down, the POR circuit will be active when VS is below VPOR. For the TLV4021 and TLV4031, the POR circuit will force the output to High-Z, and for the TLV4041 and TLV4051, the POR circuit will hold the output low at (V-). When VS is greater than, or equal to, the minimum recommended operating voltage, the comparator output reflects the state of the input (IN).

The following pictures represent how the TLV40x1 outputs respond for VS rising and falling. For the comparators with open-drain outputs (TLV4021/4031), IN is connected to (V-) to highlight the transition from POR circuit control to standard comparator operation where the output reflects the input condition. Note how the output goes low when VS reaches 1.45V. Likewise, for the comparators with push-pull outputs (TLV4041/4051), the input is connected to (V+). Note how the output goes high when VS reaches 1.45V.

TLV4021 TLV4031 TLV4041 TLV4051 Rising21PoR.gifFigure 33. TLV4021/4031 Output for VS Rising
TLV4021 TLV4031 TLV4041 TLV4051 Rising41PoR.gifFigure 35. TLV4041/4051 Output for VS Rising
TLV4021 TLV4031 TLV4041 TLV4051 Falling21PoR.gifFigure 34. TLV4021/4031 Output for VS Falling
TLV4021 TLV4031 TLV4041 TLV4051 Falling41PoR.gifFigure 36. TLV4041/4051 Output for VS Falling