SNVSB04B March   2019  – June 2020 TLV4021 , TLV4031 , TLV4041 , TLV4051

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      TLV40x1 Configurations
  4. Revision History
  5. Pin Configuration and Functions
    1.     DSBGA Package Pin Functions
    2.     SOT-23 Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power ON Reset (POR)
      2. 7.4.2 Input (IN)
      3. 7.4.3 Switching Thresholds and Hysteresis (VHYS)
      4. 7.4.4 Output (OUT)
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Monitoring (V+)
      2. 8.1.2 Monitoring a Voltage Other than (V+)
      3. 8.1.3 VPULLUP to a Voltage Other than (V+)
    2. 8.2 Typical Application
      1. 8.2.1 Under-Voltage Detection
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Additional Application Information
        1. 8.2.2.1 Pull-up Resistor Selection
        2. 8.2.2.2 Input Supply Capacitor
        3. 8.2.2.3 Sense Capacitor
    3. 8.3 What to Do and What Not to Do
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TJ = 25°C and VS = 3.3 V (unless otherwise noted)
TLV4021 TLV4031 TLV4041 TLV4051 VITpos_v_temp_R1.gif
TLV40x1R1
Figure 2. Positive Threshold vs Temperature
TLV4021 TLV4031 TLV4041 TLV4051 VITneg_v_temp_R1.gif
TLV40x1R1
Figure 4. Negative Threshold vs Temperature
TLV4021 TLV4031 TLV4041 TLV4051 VHYST_v_temp_R1.gif
TLV40x1R1
Figure 6. Hysteresis vs Temperature
TLV4021 TLV4031 TLV4041 TLV4051 VITpos_v_temp_R2.gif
TLV40x1R2
Figure 8. Positive Threshold vs Temperature
TLV4021 TLV4031 TLV4041 TLV4051 VITneg_v_temp_R2.gif
TLV40x1R2
Figure 10. Negative Threshold vs Temperature
TLV4021 TLV4031 TLV4041 TLV4051 VHYST_v_temp_R2.gif
TLV40x1R2
Figure 12. Hysteresis vs Temperature
TLV4021 TLV4031 TLV4041 TLV4051 VITpos_v_temp_Matrix2.gif
TLV4021S5
Figure 14. Positive Threshold vs Temperature
TLV4021 TLV4031 TLV4041 TLV4051 VITneg_v_temp_Matrix2.gif
TLV4021S5
Figure 16. Negative Threshold vs Temperature
TLV4021 TLV4031 TLV4041 TLV4051 VHYST_v_VCC_Matrix2.gif
TLV4021S5
Figure 18. Hysteresis vs Supply Voltage
TLV4021 TLV4031 TLV4041 TLV4051 IB_v_VCM_1_8_R2.gif
VS = 1.8V to 5V TLV40x1Ry
Figure 20. Bias Current vs Common Mode Voltage
TLV4021 TLV4031 TLV4041 TLV4051 Vol_v_Io_1_8V_R2.gif
VS = 1.8V
Figure 22. Output Voltage vs Output Sinking Current
TLV4021 TLV4031 TLV4041 TLV4051 Vol_v_Io_3_3_R2.gif
VS = 3.3V
Figure 24. Output Voltage vs Output Sinking Current
TLV4021 TLV4031 TLV4041 TLV4051 Vol_v_Io_5V_R2.gif
VS = 5V
Figure 26. Output Voltage vs Output Sinking Current
TLV4021 TLV4031 TLV4041 TLV4051 Iq_v_Temp_R2.gif
Figure 28. Supply Current vs Temperature
TLV4021 TLV4031 TLV4041 TLV4051 tpHL_v_Vod_VCC33_4041.gif
VS = 1.8V to 5V TLV40x1R2
Figure 30. Propagation Delay High-Low vs Input Overdrive
TLV4021 TLV4031 TLV4041 TLV4051 tpHL_v_Vod_VCC33_S5.gif
VS = 1.8V to 5V TLV4021S5
Figure 32. Propagation Delay High-Low vs Input Overdrive
TLV4021 TLV4031 TLV4041 TLV4051 VITpos_R1_Histogram.gif
TLV40x1R1 VS = 5 V
Figure 3. Positive Threshold Histogram
TLV4021 TLV4031 TLV4041 TLV4051 VITneg_R1_Histogram.gif
TLV40x1R1 VS = 5 V
Figure 5. Negative Threshold Histogram
TLV4021 TLV4031 TLV4041 TLV4051 Hysteresis_R1_Histogram.gif
TLV40x1R1 VS = 5 V
Figure 7. Hysteresis Histogram
TLV4021 TLV4031 TLV4041 TLV4051 VITpos_R2_Histogram.gif
TLV40x1R2 VS = 5 V
Figure 9. Positive Threshold Histogram
TLV4021 TLV4031 TLV4041 TLV4051 VITneg_R2_Histogram.gif
TLV40x1R2 VS = 5 V
Figure 11. Negative Threshold Histogram
TLV4021 TLV4031 TLV4041 TLV4051 Hysteresis_R2_Histogram.gif
TLV40x1R2 VS = 5 V
Figure 13. Hysteresis Histogram
TLV4021 TLV4031 TLV4041 TLV4051 VITpos_S5_Histogram.gif
TLV4021S5
Figure 15. Positive Threshold Histogram
TLV4021 TLV4031 TLV4041 TLV4051 VITneg_S5_Histogram.gif
TLV4021S5
Figure 17. Negative Threshold Histogram
TLV4021 TLV4031 TLV4041 TLV4051 Hysteresis_S5_Histogram.gif
TLV4021S5
Figure 19. Hysteresis Histogram
TLV4021 TLV4031 TLV4041 TLV4051 IOlkg_v_Temp_R2.gif
Figure 21. Output Current Leakage vs Temperature
TLV4021 TLV4031 TLV4041 TLV4051 Voh_VCC_18.gif
VS = 1.8V
Figure 23. Output Voltage vs Output Sourcing Current
TLV4021 TLV4031 TLV4041 TLV4051 Voh_VCC_33.gif
VS = 3.3V
Figure 25. Output Voltage vs Output Sourcing Current
TLV4021 TLV4031 TLV4041 TLV4051 Voh_VCC_5.gif
VS = 5V
Figure 27. Output Voltage vs Output Sourcing Current
TLV4021 TLV4031 TLV4041 TLV4051 tpLH_v_Vod_VCC33_4041.gif
VS = 1.8V to 5V TLV40x1R2
Figure 29. Propagation Delay Low-High vs Input Overdrive
TLV4021 TLV4031 TLV4041 TLV4051 tpLH_v_Vod_VCC33_S5.gif
VS = 1.8V to 5V TLV4021S5
Figure 31. Propagation Delay Low-High vs Input Overdrive