SBVS283F August   2016  – October 2020 TLV733P-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Shutdown and Output Enable
      3. 7.3.3 Internal Foldback Current Limit
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Capacitor Selection
      2. 8.1.2 Dropout Voltage
    2. 8.2 Typical Applications
      1. 8.2.1 DC-DC Converter Post Regulation
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Design Considerations
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Capacitor-Free Operation from a Battery Input Supply
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Design Considerations
        3. 8.2.2.3 Application Curve
  9. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Examples
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Evaluation Module
      2. 10.1.2 Device Nomenclature
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Input and Output Capacitor Selection

The TLV733P-Q1 uses an advanced internal control loop to obtain stable operation both with and without the use of input or output capacitors. Dynamic performance is improved with the use of an output capacitor, and can be improved with an input capacitor. An output capacitance of 0.1 μF or larger generally provides good dynamic response. Use X5R- and X7R-type ceramic capacitors because these capacitors have minimal variation in value and equivalent series resistance (ESR) over temperature.

Although an input capacitor is not required for stability, increased output impedance from the input supply can compromise the performance of the TLV733P-Q1. Good analog design practice is to connect a 0.1-µF to 1-µF capacitor from IN to GND. This capacitor counteracts reactive input sources and improves transient response, input ripple, and PSRR. Use an input capacitor if the source impedance is greater than 0.5 Ω. Use a higher-value capacitor if large, fast rise-time load transients are anticipated, or if the device is located several inches from the input power source.

Figure 8-1 shows the transient performance improvements with an external 1-µF capacitor on the output versus no output capacitor. The data in this figure are taken with an increasing load step from 50 mA to 300 mA, and the peak output voltage deviation (load transient response) is measured. For low output current slew rates,
(< 0.1 A/µs), the transient performance of the device is similar with or without an output capacitor. When the current slew rate is increased, the peak voltage deviation is significantly increased. For loads that exhibit fast current slew rates above 0.1 A/µs, use an output capacitor. For best performance, the maximum recommended output capacitance is 100 µF.

GUID-7A1132CD-1809-42AB-ADDF-35FED9304590-low.gif
Output current stepped from 50 mA to 300 mA, output voltage change measured at positive dI/dt
Figure 8-1 Output Voltage Deviation vs Load Step Slew Rate

Some applications benefit from the removal of the output capacitor. In addition to space and cost savings, the removal of the output capacitor lowers inrush current as a result of eliminating the required current flow into the output capacitor at startup. In these cases, take care to ensure that the load is tolerant of the additional output voltage deviations.