SNOSD29E December   2016  – April 2018 TLV8541 , TLV8542 , TLV8544

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Low Power PIR Motion Detector
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
    1.     Pin Functions: TLV8541 DBV
    2.     Pin Functions: TLV8542 D & RUG
    3.     Pin Functions: TLV8544 PW & D
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Rail-To-Rail Input
      2. 8.4.2 Supply Current Changes Over Common Mode
      3. 8.4.3 Design Optimization With Rail-To-Rail Input
      4. 8.4.4 Design Optimization for Nanopower Operation
      5. 8.4.5 Common-Mode Rejection
      6. 8.4.6 Output Stage
      7. 8.4.7 Driving Capacitive Load
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Battery-Powered Wireless PIR Motion Detectors
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Calculation of the Cutoff Frequencies and Gain of Stage A:
        2. 9.2.2.2 Calculation of the Cutoff Frequencies and Gain of Stage B
        3. 9.2.2.3 Calculation of the Total Gain of Stages A and B
        4. 9.2.2.4 Window Comparator Stage
        5. 9.2.2.5 Reference Voltages
      3. 9.2.3 Application Curve
    3. 9.3 Typical Application: 60-Hz Twin T Notch Filter
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curve
    4. 9.4 Dos and Don'ts
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resources
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

The notch frequency is set by:

Equation 10. F0 = 1 / 2πRC.

To achieve a 60-Hz notch use R = 10 MΩ and C = 270 pF. If eliminating 50-Hz noise, use R = 11.8 MΩ and C = 270 pF.

The twin T notch filter works by having two separate paths from VIN to the input of the amplifier. A low-frequency path through the series input resistors and another separate high-frequency path through the series input capacitors. However, at frequencies around the notch frequency, the two paths have opposing phase angles, and the two signals tend to cancel at the input of the amplifier.

To ensure that the target center frequency is achieved and to maximize the notch depth (Q factor) the filter must be as balanced as possible. To obtain circuit balance, while overcoming limitations of available standard resistor and capacitor values, use passives in parallel to achieve the 2C and R/2 circuit requirements for the filter components that connect to ground.

To make sure passive component values stay as expected, clean the board with alcohol, rinse with deionized water, and air dry. Make sure board remains in a relatively low humidity environment to minimize moisture which may increase the conductivity of board components. Also large resistors come with considerable parasitic stray capacitance which effects can be reduced by cutting out the ground plane below components of concern.

Large resistors are used in the feedback network to minimize battery drain. When designing with large resistors, resistor thermal noise, op amp current noise, as well as op-amp voltage noise, must be considered in the noise analysis of the circuit. The noise analysis for the circuit in Figure 36 can be done over a bandwidth of 2 kHz, which takes the conservative approach of overestimating the bandwidth (TLV8544 typical GBW/AV is lower, where AV is the gain of the system). The total noise at the output is approximately 800 µVpp, which is excellent considering the total consumption of the circuit is only 500 nA per channel. The dominant noise terms are op-amp voltage noise, current noise through the feedback network (430 µVp-p), and current noise through the notch filter network (280 µVp-p). Thus the total noise of the circuit is below 1/2 LSB of a 10-bit system with a 2-V reference, which is 1 mV.