SBOS980A May   2019  – June 2020 TLV9002-Q1 , TLV9004-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Single-Pole, Low-Pass Filter
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions: TLV9002-Q1
    2.     Pin Functions: TLV9004-Q1
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information for Dual Channel
    5. 7.5 Thermal Information for Quad Channel
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Rail-to-Rail Input
      3. 8.3.3 Rail-to-Rail Output
      4. 8.3.4 Overload Recovery
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 TLV900x-Q1 Low-Side, Current Sensing Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Single-Supply Photodiode Amplifier
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Input and ESD Protection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, V+ = 2.75 V, V– = –2.75 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted)
TLV9002-Q1 TLV9004-Q1 D001.gif
VS = 5 V
Figure 1. Offset Voltage Distribution Histogram
TLV9002-Q1 TLV9004-Q1 D003.gif
Figure 3. Input Offset Voltage vs Temperature
TLV9002-Q1 TLV9004-Q1 D005.gif
Figure 5. Offset Voltage vs Supply Voltage
TLV9002-Q1 TLV9004-Q1 D007.gif
Figure 7. IB and IOS vs Common-Mode Voltage
TLV9002-Q1 TLV9004-Q1 D009.gif
CL = 10 pF
Figure 9. Open-Loop Gain and Phase vs Frequency
TLV9002-Q1 TLV9004-Q1 D011.gif
CL = 10 pF
Figure 11. Closed-Loop Gain vs Frequency
TLV9002-Q1 TLV9004-Q1 D013.gif
Figure 13. PSRR vs Frequency
TLV9002-Q1 TLV9004-Q1 D015.gif
Figure 15. CMRR vs Frequency
TLV9002-Q1 TLV9004-Q1 D017.gif
Figure 17. 0.1 Hz to 10 Hz Integrated Voltage Noise
TLV9002-Q1 TLV9004-Q1 D019.gif
VS = 5.5 V VCM = 2.5 V G = 1
BW = 80 kHz VOUT = 0.5 VRMS
Figure 19. THD + N vs Frequency
TLV9002-Q1 TLV9004-Q1 D021.gif
Figure 21. Quiescent Current vs Supply Voltage
TLV9002-Q1 TLV9004-Q1 D023.gif
Figure 23. Open-Loop Output Impedance vs Frequency
TLV9002-Q1 TLV9004-Q1 D025.gif
G = –1 VIN = 100 mVpp
Figure 25. Small Signal Overshoot vs Capacitive Load
TLV9002-Q1 TLV9004-Q1 D027.gif
G = 1 VIN = 6.5 VPP
Figure 27. No Phase Reversal
TLV9002-Q1 TLV9004-Q1 D029.gif
G = 1 VIN = 100 mVPP CL = 10 pF
Figure 29. Small-Signal Step Response
TLV9002-Q1 TLV9004-Q1 D031.gif
G = 1 CL = 100 pF 2-V step
Figure 31. Large-Signal Settling Time (Negative)
TLV9002-Q1 TLV9004-Q1 D033.gif
Figure 33. Short-Circuit Current vs Temperature
TLV9002-Q1 TLV9004-Q1 D035.gif
Figure 35. Electromagnetic Interference Rejection Ratio Referred to Noninverting Input (EMIRR+) vs Frequency
TLV9002-Q1 TLV9004-Q1 D002.gif
VS = 5 V, TA = –40°C to +125°C
Figure 2. Offset Voltage Drift Distribution Histogram
TLV9002-Q1 TLV9004-Q1 D004.gif
Figure 4. Offset Voltage vs Common-Mode
TLV9002-Q1 TLV9004-Q1 D006.gif
Figure 6. IB and IOS vs Temperature
TLV9002-Q1 TLV9004-Q1 D008.gif
Figure 8. Open-Loop Gain vs Temperature
TLV9002-Q1 TLV9004-Q1 D010.gif
Figure 10. Open-Loop Gain vs Output Voltage
TLV9002-Q1 TLV9004-Q1 D012.gif
Figure 12. Output Voltage vs Output Current (Claw)
TLV9002-Q1 TLV9004-Q1 D014.gif
VS = 1.8 V to 5.5 V
Figure 14. DC PSRR vs Temperature
TLV9002-Q1 TLV9004-Q1 D016.gif
VCM = (V–) – 0.1 V to (V+) – 1.4 V
Figure 16. DC CMRR vs Temperature
TLV9002-Q1 TLV9004-Q1 D018.gif
Figure 18. Input Voltage Noise Spectral Density
TLV9002-Q1 TLV9004-Q1 D020.gif
VS = 5.5 V VCM = 2.5 V f = 1 kHz
G = 1 BW = 80 kHz
Figure 20. THD + N vs Amplitude
TLV9002-Q1 TLV9004-Q1 D022.gif
Figure 22. Quiescent Current vs Temperature
TLV9002-Q1 TLV9004-Q1 D024.gif
G = 1 VIN = 100 mVpp
Figure 24. Small Signal Overshoot vs Capacitive Load
TLV9002-Q1 TLV9004-Q1 D026.gif
Figure 26. Phase Margin vs Capacitive Load
TLV9002-Q1 TLV9004-Q1 D028.gif
G = –10 VIN = 600 mVPP
Figure 28. Overload Recovery
TLV9002-Q1 TLV9004-Q1 D030.gif
G = 1 VIN = 4 VPP CL = 10 pF
Figure 30. Large-Signal Step Response
TLV9002-Q1 TLV9004-Q1 D032.gif
G = 1 CL = 100 pF 2-V step
Figure 32. Large-Signal Settling Time (Positive)
TLV9002-Q1 TLV9004-Q1 D034.gif
Figure 34. Maximum Output Voltage vs Frequency
TLV9002-Q1 TLV9004-Q1 D036.gif
Figure 36. Channel Separation