SBOS839J March   2017  – September 2019 TLV9061 , TLV9062 , TLV9064

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Single-Pole, Low-Pass Filter
      2.      Small-Signal Overshoot vs Load Capacitance
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions: TLV9061
    2.     Pin Functions: TLV9061S
    3.     Pin Functions: TLV9062
    4.     Pin Functions: TLV9062S
    5.     Pin Functions: TLV9064
    6.     Pin Functions: TLV9064S
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information: TLV9061
    5. 8.5  Thermal Information: TLV9061S
    6. 8.6  Thermal Information: TLV9062
    7. 8.7  Thermal Information: TLV9062S
    8. 8.8  Thermal Information: TLV9064
    9. 8.9  Thermal Information: TLV9064S
    10. 8.10 Electrical Characteristics
    11. 8.11 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Rail-to-Rail Input
      2. 9.3.2 Rail-to-Rail Output
      3. 9.3.3 EMI Rejection
      4. 9.3.4 Overload Recovery
      5. 9.3.5 Shutdown Function
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Typical Low-Side Current Sense Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
  11. 11Power Supply Recommendations
    1. 11.1 Input and ESD Protection
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information: TLV9061

THERMAL METRIC(1) TLV9061 UNIT
DBV (SOT-23) DCK (SC70) DPW (X2SON)
5 PINS 5 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 221.7 263.3 467 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 144.7 75.5 211.6 °C/W
RθJB Junction-to-board thermal resistance 49.7 51 332.2 °C/W
ψJT Junction-to-top characterization parameter 26.1 1 29.3 °C/W
ψJB Junction-to-board characterization parameter 49 50.3 330.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A 125 °C/W
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.