SBOSA34C January   2021  – September 2021 TLV9351-Q1 , TLV9352-Q1 , TLV9354-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information for Single Channel
    5. 6.5 Thermal Information for Dual Channel
    6. 6.6 Thermal Information for Quad Channel
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Protection Circuitry
      2. 7.3.2 EMI Rejection
      3. 7.3.3 Phase Reversal Protection
      4. 7.3.4 Thermal Protection
      5. 7.3.5 Capacitive Load and Stability
      6. 7.3.6 Common-Mode Voltage Range
      7. 7.3.7 Electrical Overstress
      8. 7.3.8 Overload Recovery
      9. 7.3.9 Typical Specifications and Distributions
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High Voltage Precision Comparator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, VS = ±20 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 10 pF (unless otherwise noted)

GUID-A7949ACA-71DD-4183-B16A-0D7B67F641FC-low.gif
Distribution from 15462 amplifiers, TA = 25°C
Figure 6-1 Offset Voltage Production Distribution
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VCM = V+
Figure 6-3 Offset Voltage vs Temperature
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TA = 25°C
Figure 6-5 Offset Voltage vs Common-Mode Voltage
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TA = 125°C
Figure 6-7 Offset Voltage vs Common-Mode Voltage
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Figure 6-9 Offset Voltage vs Power Supply
GUID-134FBC33-591A-42BD-9AE2-FE85F4CDFF3B-low.gifFigure 6-11 Closed-Loop Gain vs Frequency
GUID-F34EE6C1-CF72-4584-8985-E205179DF517-low.gifFigure 6-13 Input Bias Current vs Temperature
GUID-4F8BC80E-A6DF-43EE-AE7E-511CB55B11CB-low.gifFigure 6-15 Output Voltage Swing vs Output Current (Sinking)
GUID-B8C3BCDD-CE25-46C0-8D6A-2937F383C40D-low.gif
f = 0 Hz
Figure 6-17 CMRR vs Temperature (dB)
GUID-38F0FF20-B3EB-4557-A379-5D10BBE75964-low.gifFigure 6-19 0.1-Hz to 10-Hz Noise
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BW = 80 kHz, VOUT = 1 VRMS
Figure 6-21 THD+N Ratio vs Frequency
GUID-D6E497FB-0442-403A-AAA5-650C9D438D2F-low.gif
VCM = V–
Figure 6-23 Quiescent Current vs Supply Voltage
GUID-227C7129-C322-4707-8EC4-C11201D4080A-low.gifFigure 6-25 Open-Loop Voltage Gain vs Temperature (dB)
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G = –1, 10-mV output step
Figure 6-27 Small-Signal Overshoot vs Capacitive Load
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Figure 6-29 Phase Margin vs Capacitive Load
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G = –10
Figure 6-31 Positive Overload Recovery
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CL = 20 pF, G = 1, 20-mV step response
Figure 6-33 Small-Signal Step Response, Rising
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CL = 20 pF, G = 1
Figure 6-35 Large-Signal Step Response (Rising)
GUID-D3BB6E00-C76D-4802-B396-79BFF902F782-low.gif
CL = 20 pF, G = –1
Figure 6-37 Large-Signal Step Response
GUID-C1544B4F-A149-4D6B-87F9-CFA20F693C96-low.gifFigure 6-39 Maximum Output Voltage vs Frequency
GUID-908DD3BD-5A1A-4DFC-BEEA-21AD0C429FF4-low.gifFigure 6-41 EMIRR (Electromagnetic Interference Rejection Ratio) at Inputs vs Frequency
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Distribution from 60 amplifiers
Figure 6-2 Offset Voltage Drift Distribution
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VCM = V–
Figure 6-4 Offset Voltage vs Temperature
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TA = 25°C
Figure 6-6 Offset Voltage vs Common-Mode Voltage (Transition Region)
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TA = –40°C
Figure 6-8 Offset Voltage vs Common-Mode Voltage
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CL = 20 pF
Figure 6-10 Open-Loop Gain and Phase vs Frequency
GUID-A4C47872-1EBA-4258-9765-1B23D280C12D-low.gifFigure 6-12 Input Bias Current vs Common-Mode Voltage
GUID-E501C2E3-50AE-4ABC-ADD8-EB9A1B5F04CF-low.gifFigure 6-14 Output Voltage Swing vs Output Current (Sourcing)
GUID-3D1C80AD-6FD5-4035-8B5E-27023C407417-low.gifFigure 6-16 CMRR and PSRR vs Frequency
GUID-6000971E-7EC9-4D26-8B42-6A40D8416EDA-low.gif
f = 0 Hz
Figure 6-18 PSRR vs Temperature (dB)
GUID-003E889E-1C55-41EF-A91F-7E7C8E8EA377-low.gifFigure 6-20 Input Voltage Noise Spectral Density vs Frequency
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BW = 80 kHz, f = 1 kHz
Figure 6-22 THD+N vs Output Amplitude
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Figure 6-24 Quiescent Current vs Temperature
GUID-8079B947-D8D7-4EE0-A579-76E815EEA985-low.gifFigure 6-26 Open-Loop Output Impedance vs Frequency
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G = 1, 10-mV output step
Figure 6-28 Small-Signal Overshoot vs Capacitive Load
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VIN = ±20 V; VS = VOUT = ±17 V
Figure 6-30 No Phase Reversal
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G = –10
Figure 6-32 Negative Overload Recovery
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CL = 20 pF, G = –1, 20-mV step response
Figure 6-34 Small-Signal Step Response
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CL = 20 pF, G = 1
Figure 6-36 Large-Signal Step Response (Falling)
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Figure 6-38 Short-Circuit Current vs Temperature
GUID-2E3B2012-BC05-4D3E-8E80-817B3062A7D4-low.gifFigure 6-40 Channel Separation vs Frequency