SBOSA67B Data sheet

SBOSA67B November 2021 – March 2022 TLV9361 , TLV9362 , TLV9364

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

D|8
- MSOI002K
PW|8
- MPDS568
DGK|8
- MPDS028D
DDF|8
- MPDS569B

Thermal pad, mechanical data (Package|Pins)

DGK|8
- QFND519

Orderable Information

6.8 Typical Characteristics

at T_A = 25°C, V_S = ±20 V, V_CM = V_S / 2, R_LOAD = 10 kΩ (unless otherwise noted)

Distribution from 74 amplifiers, T_A = 25°C

Figure 6-1 Offset Voltage Production Distribution

V_CM = V-
Data from 74 amplifiers

Figure 6-3 Offset Voltage vs Temperature

T_A = 125°C
Data from 74 amplifiers

Figure 6-5 Offset Voltage vs Common-Mode Voltage

V_CM = V–
Data from 74 amplifiers

Figure 6-7 Offset Voltage vs Power Supply

Figure 6-9 Input Bias Current and Offset Current vs Common-Mode Voltage

G = +1, C_L = 20 pF

Figure 6-11 Slew Rate vs Input Step Voltage

V_S = 40 V

Figure 6-13 Output Voltage Swing vs Output Current (Sinking)

V_S = 5 V

Figure 6-15 Output Voltage Swing vs Output Current (Sinking)

V_S = 40 V

Figure 6-17 CMRR vs Temperature

Figure 6-19 PSRR vs Temperature

Figure 6-21 Input Voltage Noise Spectral Density vs Frequency

V_CM = V–

Figure 6-23 Quiescent Current vs Temperature

Figure 6-25 Open-Loop Output Impedance vs Frequency

20-mV_pp Output Step, G = +1

Figure 6-27 Small-Signal Overshoot vs Capacitive Load

G = –10

Figure 6-29 Positive Overload Recovery

C_L = 20 pF, G = 1, 20-mV_pp step response

Figure 6-31 Small-Signal Step Response

C_L = 20 pF, G = 1, 5-V_pp step response

Figure 6-33 Large-Signal Step Response

Figure 6-35 Maximum Output Voltage vs Frequency

Figure 6-37 EMIRR (Electromagnetic Interference Rejection Ratio) vs Frequency

Distribution from 74 amplifiers

Figure 6-2 Offset Voltage Drift Distribution

T_A = 25°C
Data from 74 amplifiers

Figure 6-4 Offset Voltage vs Common-Mode Voltage

T_A = –40°C
Data from 74 amplifiers

Figure 6-6 Offset Voltage vs Common-Mode Voltage

Figure 6-8 Closed-Loop Gain vs Frequency

Figure 6-10 Input Bias Current and Offset Current vs Temperature

V_S = 40 V

Figure 6-12 Output Voltage Swing vs Output Current (Sourcing)

V_S = 5 V

Figure 6-14 Output Voltage Swing vs Output Current (Sourcing)

Figure 6-16 CMRR and PSRR vs Frequency

V_S = 5 V

Figure 6-18 CMRR vs Temperature

Figure 6-20 0.1-Hz to 10-Hz Noise

V_CM = V–

Figure 6-22 Quiescent Current vs Supply Voltage

Figure 6-24 Open-Loop Voltage Gain vs Temperature (dB)

20-mV_pp Output Step, G = -1

Figure 6-26 Small-Signal Overshoot vs Capacitive Load

G = +1

Figure 6-28 Phase Margin vs Capacitive Load

G = –10

Figure 6-30 Negative Overload Recovery

C_L = 20 pF, G = -1, 20-mV_pp step response

Figure 6-32 Small-Signal Step Response

C_L = 20 pF, G = -1, 5-V_pp step response

Figure 6-34 Large-Signal Step Response

Figure 6-36 Channel Separation vs Frequency