SLVS555M November   2004  – January 2023 TLVH431 , TLVH431A , TLVH431B , TLVH432 , TLVH432A , TLVH432B

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 TLVH43x Electrical Characteristics
    6. 6.6 TLVH43xA Electrical Characteristics
    7. 6.7 TLVH43xB Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Open Loop (Comparator)
      2. 8.4.2 Closed Loop
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Comparator With Integrated Reference (Open Loop)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Basic Operation
          2. 9.2.1.2.2 Overdrive
          3. 9.2.1.2.3 Output Voltage and Logic Input Level
            1. 9.2.1.2.3.1 Input Resistance
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Shunt Regulator/Reference
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Programming Output/Cathode Voltage
          2. 9.2.2.2.2 Total Accuracy
          3. 9.2.2.2.3 Stability
        3. 9.2.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Related Links
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 TLVH43x Electrical Characteristics

at 25°C free-air temperature (unless otherwise noted)
PARAMETERTEST CONDITIONSTLVH431
TLVH432		UNIT
MINTYPMAX
VREFReference voltageVKA = VREF,
IK = 10 mA		TA = 25°C1.2221.241.258V
TA = full range,
See Figure 7-1(1)		TLVH431C1.211.27
TLVH431I1.2021.278
TLVH431Q1.1941.286
VREF(dev)VREF deviation over full temperature range(2)VKA = VREF, IK = 10 mA, See Figure 7-1(1)TLVH431C412mV
TLVH431I620
TLVH431Q1131
GUID-9D73182A-E67B-4AB0-BEF4-CBA1788F346B-low.gifRatio of VREF change to
cathode voltage change		IK = 10 mA, VK = VREF to 18 V, See Figure 7-2–1.5–2.7mV/V
IrefReference terminal currentIK = 10 mA, R1 = 10 kΩ, R2 = open, See Figure 7-20.10.5μA
Iref(dev)Iref deviation over full
temperature range(2)		IK = 10 mA, R1 = 10 kΩ, R2 = open,
See Figure 7-2(1)		TLVH431C0.050.3μA
TLVH431I0.10.4
TLVH431Q0.150.5
IK(min)Minimum cathode current for regulationVKA = VREF, See Figure 7-160100μA
IK(off)Off-state cathode currentVREF = 0, VKA = 18 V, See Figure 7-30.020.1μA
|zKA|Dynamic impedance(3)VKA = VREF, f ≤ 1 kHz, IK = 0.1 mA to 70 mA,
See Figure 7-1		0.250.4Ω
(1) Full temperature ranges are –40°C to +125°C for TLVH431Q, –40°C to +85°C for TLVH431I, and 0°C to 70°C for TLVH431C.
(2) The deviation parameters VREF(dev) and Iref(dev) are defined as the differences between the maximum and minimum values obtained over the rated temperature range. The average full-range temperature coefficient of the reference input voltage, αVREF, is defined as:
GUID-4FA54E2A-E9B0-4286-BA9E-A83CE3C19E79-low.gif
where ΔTA is the rated operating free-air temperature range of the device.
αVREF can be positive or negative, depending on whether minimum VREF or maximum VREF, respectively, occurs at the lower temperature.
(3) The dynamic impedance is defined as:
GUID-7B57BF07-B6F9-418B-B9B8-8DB605835CB6-low.gif
When the device is operating with two external resistors (see Figure 7-2), the total dynamic impedance of the circuit is defined as:
GUID-D9F58C09-AEC7-49A1-9974-B1F00B8C42DA-low.gif