SBOS397H August 2007 – December 2018 TMP102
Figure 12 illustrates the internal register structure of the TMP102 device. The 8-bit Pointer Register of the device is used to address a given data register. The Pointer Register uses the two least-significant bytes (LSBs) (see Table 15 and Table 16) to identify which of the data registers must respond to a read or write command. Table 6 identifies the bits of the Pointer Register byte. During a write command, P2 through P7 must always be '0'. Table 7 describes the pointer address of the registers available in the TMP102 device. The power-up reset value of P1 and P0 is 00. By default, the TMP102 device reads the temperature on power up.
|0||0||Temperature Register (Read Only)|
|0||1||Configuration Register (Read/Write)|
|1||0||TLOW Register (Read/Write)|
|1||1||THIGH Register (Read/Write)|