SNIS214E june   2021  – july 2023 TMP114

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 1.2 V Compatible Logic Inputs
      2. 8.3.2 Cyclic Redundancy Check (CRC)
      3. 8.3.3 Temperature Limits
      4. 8.3.4 Slew Rate Warning
      5. 8.3.5 NIST Traceability
    4. 8.4 Device Functional Modes
      1. 8.4.1 Continuous Conversion Mode
      2. 8.4.2 Shutdown Mode
        1. 8.4.2.1 One-Shot Temperature Conversions
    5. 8.5 Programming
      1. 8.5.1 Temperature Data Format
      2. 8.5.2 I2C and SMBus Interface
      3. 8.5.3 Device Address
      4. 8.5.4 Bus Transactions
        1. 8.5.4.1 Auto-Increment
        2. 8.5.4.2 Writes
          1. 8.5.4.2.1 CRC Enabled Writes
        3. 8.5.4.3 Reads
          1. 8.5.4.3.1 CRC Enabled Reads
        4. 8.5.4.4 General Call Reset Function
        5. 8.5.4.5 Time-Out Function
        6. 8.5.4.6 Coexist on I3C MixedBus
        7. 8.5.4.7 Cyclic Redundancy Check Implementation
    6. 8.6 Register Map
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Separate I2C Pullup and Supply Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Equal I2C Pullup and Supply Voltage Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YMT|4
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.6 Register Map

Table 8-4 TMP114 Registers
ADDRESS TYPE RESET ACRONYM REGISTER NAME SECTION
00h R 0000h Temp_Result Temperature result register Go
01h R 0000h Slew_Result Slew rate result register Go
02h R/RC 0000h Alert_Status Alert status register Go
03h R/W 0004h Configuration Configuration register Go
04h R/W F380h TLow_Limit Temperature low limit register Go
05h R/W 2A80h THigh_Limit Temperature high limit register Go
06h R/W 0A0Ah Hysteresis Hysteresis register Go
07h R/W 0500h Slew_Limit Temperature slew rate limit register Go
08h R xxxxh Unique_ID1 Unique_ID1 register Go
09h R xxxxh Unique_ID2 Unique_ID2 register Go
0Ah R xxxxh Unique_ID3 Unique_ID3 register Go
0Bh R 1114h Device_ID Device ID register Go
10h - 2Ah R xxxxh Reserved Reserved
Table 8-5 TMP114 Access Type Codes
Access Type Code Description
Read Type
R R Read
RC R
C		 Read
to Clear
R-0 R
-0		 Read
Returns 0s
Write Type
W W Write
Reset or Default Value
-n Value after reset or the default value

8.6.1 Temp_Result Register (Address = 00h) [reset = 0000h]

This register stores the latest temperature conversion result in a 16-bit two's complement format with a LSB (Least Significant Bit) equal to 0.0078125°C.

Return to Register Map.

Figure 8-20 Temp_Result Register
15 14 13 12 11 10 9 8
Temp_Result[15:8]
R-00h
7 6 5 4 3 2 1 0
Temp_Result[7:0]
R-00h
Table 8-6 Temp_Result Register Field Descriptions
Bit Field Type Reset Description
15:0 Temp_Result[15:0] R 0000h 16-bit temperature conversion result

Temperature data is represented by a 16-bit, two's complement word with an LSB (Least Significant Bit) equal to 0.0078125°C.

8.6.2 Slew_Result Register (Address = 01h) [reset = 0000h]

This register stores the latest temperature conversion result in a 14-bit two's complement format with a LSB (Least Significant Bit) equal to 0.03125°C/s. The Slew Rate Warning currently does not support negative values.

Return to Register Map.

Figure 8-21 Slew_Result Register
15 14 13 12 11 10 9 8
Slew_Result[13:6]
R-0h
7 6 5 4 3 2 1 0
Slew_Result[5:0] Reserved
R-0h R-0h
Table 8-7 Slew_Result Register Field Descriptions
Bit Field Type Reset Description
15:2 Slew_Result[13:0] R 0000h Temperature slew rate result

Temperature slew rate is represented by a 14-bit, two's complement word with an LSB (Least Significant Bit) equal to 0.03125°C/s.
1:0 Reserved R 0h These two bits will always read 0h

8.6.3 Alert_Status Register (Address = 02h) [reset = 0000h]

This register shows the current alert status of the TMP114.

Return to Register Map.

Figure 8-22 Alert_Status Register
15 14 13 12 11 10 9 8
Reserved
R-00h
7 6 5 4 3 2 1 0
CRC_Flag Slew_Status Slew_Flag THigh_Status TLow_Status THigh_Flag TLow_Flag Data_Ready_Flag
RC-0h R-0h RC-0h R-0h R-0h RC-0h RC-0h RC-0h
Table 8-8 Alert_Status Register Field Descriptions
Bit Field Type Reset Description
15:8 Reserved R 00h Reserved
7 CRC_Flag RC 0h CRC checksum error flag indicator. This indicates that the write transaction CRC checksum failed and the register settings were discarded

0h = The most recent CRC enabled write transaction was successful

1h = The most recent CRC enabled write transaction failed
6 Slew_Status R 0h Slew status indicator. This bit is set if there is a positive slew rate exceeding the Slew_Rate_Limit.

0h = The most recent temperature conversion result is below the Slew_Rate_Limit

1h = The most recent temperature conversion result is above the Slew_Rate_Limit
5 Slew_Flag RC 0h Slew rate flag indicator. This indicates that the temperature slew rate crossed the slew rate limit threshold. Reading the Alert_Status register will clear this bit

0h = The most recent temperature conversion has not crossed the Slew_Rate_Limit threshold

1h = A temperature conversion has crossed the Slew_Rate_Limit threshold
4 THigh_Status R 0h High temperature status indicator.

0h: The most recent temperature conversion result is below the THigh_Limit

1h: The most recent temperature conversion is above the THigh_Limit. Once set, this bit will not clear until a temperature conversion is below THigh_Limit - THigh_Hyst
3 TLow_Status R 0h Low temperature status indicator.

0h: The most recent temperature conversion result is above the TLow_Limit

1h: The most recent temperature conversion is below the THigh_Limit. Once set, this bit will not clear until a temperature conversion is above TLow_Limit + TLow_Hyst
2 THigh_Flag RC 0h High temperature flag indicator. This indicates that the latest temperature conversion has cross above the THigh_Limit register threshold or crossed below the THigh_Limit - THigh_Hyst threshold. Reading Alert_Status register will clear this bit.

0h = The most recent temperature conversion has not crossed the THigh_Limit or the hysteresis threshold.

1h: A temperature conversion crossed the THigh_Limit or crossed below the THigh_Limit - THigh_Hyst threshold. Once the THigh_Flag is set, THigh_Flag will not be set again until a temperature conversion is below THigh_Limit - THigh_Hyst
1 TLow_Flag RC 0h Low temperature flag indicator. This indicates that the latest temperature conversion has cross below the TLow_Limit register threshold or crossed above the Tlow_Limit + TLow_Hyst threshold. Reading Alert_Status register will clear this bit.

0h = The most recent temperature conversion has not crossed the TLow_Limit or the hysteresis threshold.

1h: A temperature conversion crossed below the TLow_Limit. Once the TLow_Flag is set, TLow_Flag will not be set again until temperature conversion is above TLow_Limit + TLow_Hyst
0 Data_Ready_Flag RC 0h Data Ready flag indicator. This indicates a new temperature conversion result is available. This bit is only cleared by reading the Alert_Status register .

0h = Data_Ready_Flag has been cleared since the last temperature conversion

1h = Data in Temp_Result is new

8.6.4 Configuration Register (Address = 03h) [reset = 0004h]

This register is used to configuration the operation of the TMP114.

Return to Register Map.

Figure 8-23 Configuration Register
15 14 13 12 11 10 9 8
Reserved ADC_Conv_Time[1:0] Reset
R-00h RW-0h R/W-0h
7 6 5 4 3 2 1 0
AVG CRC_En Reserved OS Mode Conv_Period[2:0]
R/W-0h R/W-0h R-0h R/W-0h R/W-0h R/W-4h
Table 8-9 Configuration Register Field Descriptions
Bit Field Type Reset Description
15:8 Reserved R 00h Reserved
10:9 ADC_Conv_Time[1:0] R/W 0h ADC Conversion Time setting. This bit field changes the ADC conversion time and resolution of the TMP114. If the averaging time is longer than the conversion period setting the minimum cycle time will be the averaging time.

0h = 6.4 ms

1h = 3.5 ms

2h = 2.0 ms

3h = 1.2 ms

8 Reset R/W 0h Software reset bit.

When set to 1 it triggers software reset with a duration of 1 ms.

This bit will always read back 0
7 AVG R/W 0h Averaging enable bit. Averaging will force every measurement including one-shot measurements to be averaged with eight conversions.

0h: Averaging is disabled

1h: Averaging is enabled
6 CRC_En R/W 0h CRC enable. Enables the CRC feature for the next transaction after a stop command is received.

0h = CRC is disabled

1h = CRC is enabled
5 Reserved R 0h Reserved
4 OS R/W 0h One-shot conversion trigger. After completing the one-shot conversion this bit is reset to 0h. Triggering a one-shot conversion will place the TMP114 into shutdown mode.

0h = Default

1h = Trigger a one-shot conversion
3 Mode R/W 0h Conversion mode selection bit.

0h = Continuous conversion mode

1h = Shutdown mode
2:0 Conv_Period[2:0] R/W 4h Conversion period setting. This bit field changes the conversion period of the TMP114. If the averaging time is longer than the conversion period setting the minimum conversion time will be the averaging time.

0h = 6.4 ms

1h = 31.25 ms / 32 Hz

2h = 62.5 ms / 16 Hz

3h = 125 ms / 8 Hz

4h = 250 ms / 4 Hz

5h = 500 ms / 2 Hz

6h = 1 s / 1 Hz

7h = 2 s / 0.5 Hz

8.6.5 TLow_Limit Register (Address = 04h) [reset = F380h]

This register is used to configuration the low temperature limit of the TMP114. The limit is formatted in a 14-bit two's complement format with a LSB (Least Significant Bit) equal to 0.03125°C. The range of the register is ±256°C. The default value on start-up is F380h or -25°C. If the THigh_Limit register is equal to or less than the TLow_Limit register the temperature limits will be ignored.

Return to Register Map.

Figure 8-24 TLow_Limit Register
15 14 13 12 11 10 9 8
TLow_Limit[13:6]
R/W-F3h
7 6 5 4 3 2 1 0
TLow_Limit[5:0] Reserved
R/W-20h R-0h
Table 8-10 TLow_Limit Register Field Descriptions
Bit Field Type Reset Description
15:2 TLow_Limit[13:0] R/W 3CE0h 14-bit temperature low limit setting.

Temperature low limit is represented by a 14-bit, two's complement word with an LSB (Least Significant Bit) equal to 0.03125°C. The default setting for this is -25°C.
1:0 Reserved R 0h These two bits will always read 0h

8.6.6 THigh_Limit Register (Address = 05h) [reset = 2A80h]

This register is used to configuration the high temperature limit of the TMP114. The limit is formatted in a 14-bit two's complement format with a LSB (Least Significant Bit) equal to 0.03125°C. The range of the register is ±256 °C. The default value on start-up is 2A80h or 85°C. If the THigh_Limit register is equal to or less than the TLow_Limit register the temperature limits will be ignored.

Return to Register Map.

Figure 8-25 THigh_Limit Register
15 14 13 12 11 10 9 8
THigh_Limit[13:6]
R/W-2Ah
7 6 5 4 3 2 1 0
THigh_Limit[5:0] Reserved
R/W-20h R-0h
Table 8-11 THigh_Limit Register Field Descriptions
Bit Field Type Reset Description
15:2 THigh_Limit[13:0] R/W 0AA0h 14-bit temperature high limit setting.

Temperature high limit is represented by a 14-bit, two's complement word with an LSB (Least Significant Bit) equal to 0.03125°C.
1:0 Reserved R 0h These two bits will always read 0h

8.6.7 Hysteresis Register (Address = 06h) [reset = 0A0Ah]

This register sets the hysteresis for the THigh_Limit threshold and the TLow_Limit threshold. The default hysteresis value for both the high and low limits is equal to 5°C.

The Hysteresis is in a 8-bit unsigned format with the LSB equal to 0.5°C. This gives a maximum value of 127.5°C of hysteresis.

Return to Register Map.

Figure 8-26 Hysteresis Register
15 14 13 12 11 10 9 8
THigh_Hyst[7:0]
R/W-0Ah
7 6 5 4 3 2 1 0
TLow_Hyst[7:0]
R/W-0Ah
Table 8-12 Hysteresis Register Field Descriptions
Bit Field Type Reset Description
15:8 THigh_Hyst[7:0] R/W 0Ah THigh_Limit Hysteresis setting.

Hysteresis value is represented by a unsigned byte with the LSB equal to 0.5°C. The High temperature limit hysteresis threshold is equal to (THigh_Limit - THigh_Hyst).

The default hysteresis value is 5 °C.
7:0 TLow_Hyst[7:0] R/W 0Ah TLow_Limit Hysteresis setting.

Hysteresis value is represented by a unsigned byte with the LSB equal to 0.5°C. The Low temperature limit hysteresis threshold is equal to (TLow_Limit + TLow_Hyst).

The default hysteresis value is 5 °C.

8.6.8 Slew_Limit Register (Address = 07h) [reset = 0500h]

This register is used to configure the temperature slew rate limit of the TMP126. The limit is formatted in a 13-bit unsigned format with the LSB (Least Significant Bit) equal to 0.03125°C/s. The range of the register is 0°C/s to +256°C/s. The default value of Slew_Limit[12:6] on start-up is 0140h or 10 °C/s. The slew rate limit will trigger a slew rate alert on positive slew rates that are greater than the limit.

Return to Register Map.

Figure 8-27 Slew_Limit Register
15 14 13 12 11 10 9 8
Reserved Slew_Limit[12:6]
R-0h R/W-05h
7 6 5 4 3 2 1 0
Slew_Limit[5:0] Reserved
R/W-00h R-0h
Table 8-13 Slew_Limit Register Field Descriptions
Bit Field Type Reset Description
15 Reserved R 0h This bits will always read 0h
14:2 Slew_Limit[13:0] R/W 0140h

13-bit temperature slew rate limit setting.

Temperature low limit is represented by a 13-bit unsigned word with a LSB (Least Significant Bit) equal to 0.03125°C/s. The default setting for this is 10°C/s.
1:0 Reserved R 0h These two bits will always read 0h

8.6.9 Unique_ID1 Register (Address = 08h) [reset = xxxxh]

This register contains bits 47:32 of the Unique ID for the device. The Unique ID of the device is used for NIST traceability purposes.

Return to Register Map.

Figure 8-28 Unique_ID1 Register
15 14 13 12 11 10 9 8
Unique_ID[47:40]
R-xxh
7 6 5 4 3 2 1 0
Unique_ID[39:32]
R-xxh
Table 8-14 Unique_ID Register Field Descriptions
Bit Field Type Reset Description
15:0 Unique_ID[47:32] R xxxxh Bits 47:32 of the device Unique ID

8.6.10 Unique_ID2 Register (Address = 09h) [reset = xxxxh]

This register contains bits 31:16 of the Unique ID for the device.

Return to Register Map.

Figure 8-29 Unique_ID2 Register
15 14 13 12 11 10 9 8
Unique_ID[31:24]
R-xxh
7 6 5 4 3 2 1 0
Unique_ID[23:16]
R-xxh
Table 8-15 Unique_ID2 Register Field Descriptions
Bit Field Type Reset Description
15:0 Unique_ID[31:16] R xxxxh Bits 31:16 of the device Unique ID

8.6.11 Unique_ID3 Register (Address = 0Ah) [reset = xxxxh]

This register contains bits 15:0 of the Unique ID for the device.

Return to Register Map.

Figure 8-30 Unique_ID3 Register
15 14 13 12 11 10 9 8
Unique_ID[15:8]
R-xxh
7 6 5 4 3 2 1 0
Unique_ID[7:0]
R-xxh
Table 8-16 Unique_ID3 Register Field Descriptions
Bit Field Type Reset Description
15:0 Unique_ID[15:0] R xxxxh Bits 15:0 of the device Unique ID.

8.6.12 Device_ID Register (Address = 0Bh) [reset = 1114h]

This register indicates the device ID.

Return to Register Map.

Figure 8-31 Device_ID Register
15 14 13 12 11 10 9 8
Rev[3:0] ID[11:8]
R-1h R-1h
7 6 5 4 3 2 1 0
ID[7:0]
R-14h
Table 8-17 Device_ID Register Field Descriptions
Bit Field Type Reset Description
15:12 Rev[3:0] R 1h Device revision indicator.
11:0 ID[11:0] R 114h Device ID indicator.