SBOS891C October   2018  – September 2023 TMP144

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 UART Interface Timing
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Up
      2. 7.3.2 Digital Temperature Output
      3. 7.3.3 Timeout Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Conversion Mode
      2. 7.4.2 Shutdown Mode
      3. 7.4.3 One-Shot Mode
      4. 7.4.4 Extended Temperature Mode
      5. 7.4.5 Temperature Alert Function
      6. 7.4.6 Interrupt Functionality
    5. 7.5 SMAART Wire / UART Interface
      1. 7.5.1 Communication Protocol
      2. 7.5.2 Global Software Reset
      3. 7.5.3 Global Initialization and Address Assignment Sequence
      4. 7.5.4 Global Clear Interrupt
      5. 7.5.5 Global Read and Write
      6. 7.5.6 Individual Read and Write
    6. 7.6 Register Maps
      1. 7.6.1 Temperature Result Register (P[1:0] = 00) [reset = 0000h]
      2. 7.6.2 Configuration Register (P[1:0] = 01) [reset = 0200h]
      3. 7.6.3 Temperature Low Limit Register (P[1:0] = 10) [reset = F600h]
      4. 7.6.4 Temperature High Limit Register (P[1:0] = 11) [reset = 3C00h]
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Trace Length
        2. 8.2.2.2 Voltage Drop Effect
        3. 8.2.2.3 Power Supply Noise Filtering
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YBK|4
  • YFF|4
  • YMT|4
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.5 Temperature Alert Function

The TMP144 contains a temperature alert function that monitors the device temperature and compares the result to the values stored in the temperature limit registers to determine if the device temperature is within these set limits. As shown in Figure 7-2, if the result of the temperature conversion is greater than the value in the temperature high limit register, the flag-high bit (FH) in the configuration register is set to '1'. If the result of the temperature conversion register is less than the value in the temperature low limit register, the flag-low (FL) in the configuration register is set to '1'. The clearing of the flag bits depends on the setting of the latch bit (LC) in the configuration register.
GUID-20200819-CA0I-1LXW-9SF3-9SW51WQFZNMQ-low.gif Figure 7-2 Temperature Flag Functional Diagram.

The LC bit in the configuration register when set to '1' is used to latch the value of the flag bits (FH and FL) until the host issues a read command to the configuration register. The flag bits are set to '0' when a read command is received by the device.

The LC bit when configured as '0', configures the device to operate in transparent mode, where the flag bits (FH and FL) are cleared only when the result of the temperature conversion is within the temperature limits.