SBOS759 November   2015 TMP175-Q1 , TMP75-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital Temperature Output
      2. 7.3.2 Serial Interface
        1. 7.3.2.1 Bus Overview
        2. 7.3.2.2 Serial Bus Address
        3. 7.3.2.3 Writing and Reading to the TMP175-Q1 and TMP75-Q1
        4. 7.3.2.4 Slave Mode Operations
          1. 7.3.2.4.1 Slave Receiver Mode
          2. 7.3.2.4.2 Slave Transmitter Mode
        5. 7.3.2.5 SMBus Alert Function
        6. 7.3.2.6 General Call
        7. 7.3.2.7 High-Speed Mode
        8. 7.3.2.8 Time-out Function
      3. 7.3.3 Timing Diagrams
        1. 7.3.3.1 Two-Wire Timing Diagrams
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode (SD)
      2. 7.4.2 One-Shot (OS)
      3. 7.4.3 Thermostat Mode (TM)
        1. 7.4.3.1 Comparator Mode (TM = 0)
        2. 7.4.3.2 Interrupt Mode (TM = 1)
    5. 7.5 Programming
      1. 7.5.1 Pointer Register
      2. 7.5.2 Temperature Register
      3. 7.5.3 Configuration Register
        1. 7.5.3.1 Polarity (POL)
        2. 7.5.3.2 Fault Queue (F1/F0)
        3. 7.5.3.3 Converter Resolution (R1/R0)
      4. 7.5.4 High- and Low-Limit Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Power supply, V+ 7 V
Input voltage(2) –0.5 7 V
Input current 10 mA
Operating temperature –55 127 °C
Junction temperature, TJ 150 °C
Storage temperature, Tstg –60 130 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input voltage rating applies to all TMP175-Q1 and TMP75-Q1 input voltages.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage 2.7 5.5 V
Operating free-air temperature, TA –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) TMP175-Q1, TMP75-Q1 UNIT
DGK (SOIC), D (VSSOP)
8 PINS
RθJA Junction-to-ambient thermal resistance 185 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 76.1 °C/W
RθJB Junction-to-board thermal resistance 106.4 °C/W
ψJT Junction-to-top characterization parameter 14.1 °C/W
ψJB Junction-to-board characterization parameter 104.8 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

at TA = –40°C to +125°C and V+ = 2.7 V to 5.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TEMPERATURE INPUT
Range –40 125 °C
Accuracy (temperature error) –25°C to +85°C TMP175-Q1 ±0.5 ±1.5 °C
TMP75-Q1 ±0.5 ±2
–40°C to +125°C TMP175-Q1 ±1 ±2
TMP75-Q1 ±1 ±3
Accuracy (temperature error) vs supply 0.2 ±0.5 °C/V
Resolution(1) Selectable 0.0625 °C
DIGITAL INPUT/OUTPUT
Input capacitance 3 pF
VIH High-level input logic 0.7 (V+) 6 V
VIL Low-level input logic –0.5 0.3 (V+) V
IIN Leakage input current 0 V ≤ VIN ≤ 6 V 1 µA
Input voltage hysteresis SCL and SDA pins 500 mV
VOL Low-level output logic SDA IOL = 3 mA 0 0.15 0.4 V
ALERT IOL = 4 mA 0 0.15 0.4
Resolution Selectable 9 to 12 Bits
Conversion time 9 bits 27.5 37.5 ms
10 bits 55 75
11 bits 110 150
12 bits 220 300
Timeout time 25 54 74 ms
POWER SUPPLY
Operating range 2.7 5.5 V
IQ Quiescent current Serial bus inactive 50 85 µA
Serial bus active, SCL frequency = 400 kHz 100
Serial bus active, SCL frequency = 3.4 MHz 410
ISD Shutdown current Serial bus inactive 0.1 3 µA
Serial bus active, SCL frequency = 400 kHz 60
Serial bus active, SCL frequency = 3.4 MHz 380
TEMPERATURE RANGE
Specified range –40 125 °C
Operating range –55 127 °C
(1) Specified for 12-bit resolution.

6.6 Timing Requirements

see the Timing Diagrams and Two-Wire Timing Diagrams sections for additional information(1)
FAST MODE HIGH-SPEED MODE UNIT
MIN MAX MIN MAX
ƒ(SCL) SCL operating frequency V+ 0.001 0.4 0.001 2.38 MHz
t(BUF) Bus-free time between STOP and START condition See the Timing Diagrams section 1300 160 ns
t(HDSTA) Hold time after repeated START condition.
After this period, the first clock is generated.		 600 160 ns
t(SUSTA) Repeated START condition setup time 600 160 ns
t(SUSTO) STOP condition setup time 600 160 ns
t(HDDAT) Data hold time 4 900 4 120 ns
t(SUDAT) Data setup time 100 10 ns
t(LOW) SCL clock low period V+ , see the Timing Diagrams section 1300 280 ns
t(HIGH) SCL clock high period See the Timing Diagrams section 600 60 ns
tFD Data fall time See the Timing Diagrams section 300 150 ns
tRC Clock rise time See the Two-Wire Timing Diagrams section 300 40 ns
SCLK ≤ 100 kHz, see the Timing Diagrams section 1000 ns
tFC Clock fall time See the Two-Wire Timing Diagrams section 300 40 ns
(1) Values are based on a statistical analysis of a one-time sample of devices. Minimum and maximum values are not specified and are not production tested.

6.7 Typical Characteristics

at TA = 25°C and V+ = 5 V (unless otherwise noted)
TMP175-Q1 TMP75-Q1 tc_iq-tmp_sbos759.gif
Serial bus inactive
Figure 1. Quiescent Current vs Temperature
TMP175-Q1 TMP75-Q1 tc_tconv-tmp_sbos759.gif
12-bit resolution
Figure 3. Conversion Time vs Temperature
TMP175-Q1 TMP75-Q1 tc_iq_bus_active-tmp_sbos759.gif
Figure 5. Quiescent Current With Bus Activity vs Temperature
TMP175-Q1 TMP75-Q1 tc_isd-tmp_sbos759.gif
Figure 2. Shutdown Current vs Temperature
TMP175-Q1 TMP75-Q1 tc_temp_accuracy-tmp_sbos759.gif
3 typical units, 12-bit resolution
Figure 4. Temperature Error vs Temperature