SBOS383D December   2006  – December 2016 TMP411

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
  8. Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Series Resistance Cancellation
      2. 9.3.2 Differential Input Capacitance
      3. 9.3.3 Temperature Measurement Data
      4. 9.3.4 THERM (Pin 4) and ALERTor THERM2 (Pin 6)
      5. 9.3.5 Sensor Fault
      6. 9.3.6 Undervoltage Lockout
      7. 9.3.7 Filtering
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode (SD)
      2. 9.4.2 One-Shot Conversion
    5. 9.5 Programming
      1. 9.5.1  Serial Interface
      2. 9.5.2  Bus Overview
      3. 9.5.3  Timing Diagrams
      4. 9.5.4  Serial Bus Address
      5. 9.5.5  Read and Write Operations
      6. 9.5.6  Timeout Function
      7. 9.5.7  High-Speed Mode
      8. 9.5.8  General Call Reset
      9. 9.5.9  Software Reset
      10. 9.5.10 SMBus Alert Function
    6. 9.6 Register Map
      1. 9.6.1  Register Information
      2. 9.6.2  Pointer Register
      3. 9.6.3  Temperature Registers
      4. 9.6.4  Limit Registers
      5. 9.6.5  Status Register
      6. 9.6.6  Configuration Register
      7. 9.6.7  Resolution Register
      8. 9.6.8  Conversion Rate Register
      9. 9.6.9  N-Factor Correction Register
      10. 9.6.10 Minimum and Maximum Registers
      11. 9.6.11 Consecutive Alert Register
      12. 9.6.12 THERM Hysteresis Register
      13. 9.6.13 Remote Temperature Offset Register
      14. 9.6.14 Identification Registers
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Description

Overview

The TMP411 is a dual-channel digital temperature sensor that combines a local die-temperature measurement channel in a single VSSOP-8 or SOIC-8 package. The TMP411 is two-wire and SMBus interface-compatible and is specified over a temperature range of –40°C to +125°C. The TMP411 device contains multiple registers for holding configuration information, temperature measurement results, temperature comparator maximum and minimum limits, and status information.

User-programmed high and low temperature limits stored in the TMP411 triggers an overtemperature or undertemperature alarm (ALERT) on local and remote temperatures. Additional thermal limits can be programmed into the TMP411 and can trigger another flag (THERM) that initiates a system response to rising temperatures.

The TMP411 requires only a transistor connected between D+ and D– for proper remote temperature sensing operation. The SCL and SDA interface pins require pullup resistors as part of the communication bus, while ALERT and THERM pins are open-drain outputs that require pullup resistors. ALERT and THERM pins can be shared with other devices for a wired-OR implementation, if desired. TI recommends using a 0.1-µF power-supply bypass capacitor for good local bypassing. Figure 11 shows a typical configuration for the TMP411 .

TMP411 Fig_11_SBOS383D.gif
Diode-connected configuration provides better settling time. Transistor-connected configuration provides better series resistance cancellation. NPN transistors must be diode-connected. PNP transistors can either be transistor or diode-connected. TI recommends this layout for the MMBT3906LP and MMBT3904LP devices.
Rs (optional) must be < 1.5 kΩ in most applications. Selections of Rs depends on specific applications; see the Filtering section.
CDIFF (optional) must be < 1000 pF in most applications. Selection of CDIFF depends on specific application; see the Filtering section and Figure 5.
Figure 11. Basic Connections

Functional Block Diagram

TMP411 7_2_Function_Block_SBOS383D.gif

Feature Description

Series Resistance Cancellation

Figure 11 shows series resistance in an application circuit that results from printed circuit board (PCB) trace resistance and remote line length. The TMP411 automatically cancels the resistance, which prevents a temperature offset.

The TMP411 device cancels up to 3 kΩ of series line resistance that eliminates the need for additional characterization and temperature offset correction.

See Figure 4 and Figure 5 for details on the effect of series resistance and power-supply voltage on sensed remote temperature error.

Differential Input Capacitance

The TMP411 tolerates differential input capacitance of up to 1000 pF with minimal change in temperature error. The effect of capacitance on sensed remote temperature error is shown in Figure 6.

Temperature Measurement Data

Temperature measurement data is taken over a default range of 0°C to 127°C for local and remote locations. Measurements from –55°C to +150°C can be made locally and remotely by reconfiguring the TMP411 device for the extended temperature range. To change the TMP411 configuration from the standard to the extended temperature range, switch bit 2 (RANGE) of the Configuration Register from low to high.

Temperature data resulting from conversions within the default measurement range are represented in binary form, as listed in the standard binary column of Table 1. Note that any temperature below 0°C results in a data value of zero (00h). Likewise, temperatures above 127°C results in a value of 127 (7Fh). The device can be set to measure over an extended temperature range by changing bit 2 of the Configuration Register from low to high. The change in measurement range and data format from standard binary to extended binary occurs at the next temperature conversion. For data captured in the extended temperature range configuration, an offset of 64 (40h) is added to the standard binary value, as listed in the extended binary column in Table 1. This configuration allows measurement of temperatures below 0°C. It is possible to have binary values in the range of –64°C to +191°C, but most temperature-sensing diodes measure in the range of –55°C to +150°C. The TMP411 device is rated only for ambient local temperatures ranging from –40°C to +125°C. Parameters in the Absolute Maximum Ratings table must be observed.

Table 1. Temperature Data Format (Local and Temperature High Bytes)

TEMP (°C) LOCAL AND REMOTE TEMPERATURE REGISTER HIGH BYTE VALUE (1°C RESOLUTION)
STANDARD BINARY EXTENDED BINARY
BINARY HEX BINARY HEX
–64 0000 0000 00 0000 0000 00
–50 0000 0000 E 0000 1110 0E
–25 0000 0000 00 0010 0111 27
0 0000 0000 00 0100 0000 40
1 0000 0001 01 0100 0001 41
5 0000 0101 05 0100 0101 45
10 0000 1010 0A 0100 1010 4A
25 0001 1001 19 0101 1001 59
50 0011 0010 32 0111 0010 72
75 0100 1011 4B 1000 1011 8b
100 0110 0100 64 1010 0100 A4
125 0111 1101 7D 1011 1101 BD
127 0111 1101 7F 1011 1111 BF
150 0111 1111 7F 1101 0110 D6
175 0111 1111 7F 1110 1111 EF
191 0111 1111 7F 1111 1111 FF

THERM (Pin 4) and ALERTor THERM2 (Pin 6)

The THERM and ALERT or THERM2 pins on the TMP411 device are dedicated to alarm functions. The pins are open-drain outputs that each require a pullup resistor to V+. These pins can be wire-ORed together with other alarm pins for system monitoring of multiple sensors. The THERM pin provides a thermal interrupt that cannot be software disabled. The ALERT pin is an earlier warning interrupt, and can be software disabled or masked. The ALERT or THERM2 pin can be configured as aTHERM2 pin, which is a second THERM pin (Configuration Register: AL or TH bit = 1). The default setting configures pin 6 to function as an ALERT pin (AL or TH = 0).

The THERM pin asserts low when the measured local or remote temperature is outside of the temperature range programmed in the corresponding Local and Remote THERM Limit Register. The THERM temperature limit range can be programmed with a wider range than that of the limit registers, which allows the ALERTpin to provide an earlier warning than the THERM pin. The THERM alarm resets automatically when the measured temperature falls within the THERM temperature limit range minus the hysteresis value stored in the THERM Hysteresis Register. The permitted hysteresis values are listed in Table 10. The default hysteresis is 10°C. When the ALERT or THERM2 pin is configured as a second thermal alarm (Configuration Register: bit 7 = 0, bit 5 = 1), the pin functions the same as the THERM pin, but uses the temperatures stored in the Local and Remote Temperature High and Low Limit Registers to set the comparison range.

When ALERT or THERM2 (pin 6) is configured as an ALERT pin, (Configuration Register: bit 7 = 0, bit 5 = 0), the pin asserts low when the measured local or remote temperature violates the range limit set by the corresponding Local and Remote Temperature High and Low Limit Registers. The alert function configures to assert only if the range is violated a specified number of consecutive times (either one, two, three or four times). The consecutive violation limit is set in the Consecutive Alert Register. Required consecutive faults prevent false alerts that are caused by environmental noise. The ALERT pin asserts low if the remote temperature sensor is open-circuit. When the MASK function is enabled (Configuration Register: bit 7 = 1), the ALERT pin is disabled (that is, masked). TheALERT pin resets when the master reads the device address, as long as the condition that caused the alert no longer persists, and the Status Register is reset.

Sensor Fault

The TMP411 senses a fault at the D+ input resulting from an incorrect diode connection or an open circuit. The detection circuitry consists of a voltage comparator that trips when the voltage at D+ exceeds (V+) − 0.6 V (typical). The comparator output is checked during a conversion. If a fault is detected, the last valid measured temperature is the temperature measurement result, the OPEN bit (Status Register, bit 2) is set high, and the ALERT pin asserts low if the alert function is enabled.

The D+ and D− inputs must be connected together to prevent meaningless fault warnings when the TMP411 remote sensor is not in use.

Undervoltage Lockout

The TMP411 senses when the power-supply voltage reaches a minimum voltage level for the ADC converter to function. The detection circuitry consists of a voltage comparator that enables the ADC converter after the power supply (V+) exceeds 2.45 V (typical). The comparator output is checked during a conversion. The TMP411 does not perform a temperature conversion if the power supply is not valid. The last valid measured temperature is the temperature measurement result.

Filtering

Remote junction temperature sensors are typically implemented in a noisy environment. Noise is often created by fast digital signals that corrupt measurements. The TMP411 has a built-in 65-kHz filter on the D+ and D− inputs to minimize the effects of noise. TI recommends placing a bypass capacitor differentially across the sensor inputs to protect the application against unwanted coupled signals. The value of the capacitor must be between 100 pF and 1 nF. Some applications have better overall accuracy with additional series resistance, however, this increased accuracy is specific to the setup. When series resistance is added, the value must not be greater than 3 kΩ.

If filtering is needed, TI recommends component values of 100-pF and 50-Ω on each input. Exact values are specific to the application.

space

NOTE

Whenever changing between standard and extended temperature ranges, be aware that the temperatures stored in the temperature limit registers are NOT automatically reformatted to correspond to the new temperature range format. These temperature limit values must be reprogrammed in the appropriate binary or extended binary format.

Local and remote temperature data uses two bytes for data storage. The high byte stores the temperature with a resolution of 1°C. The second or low byte stores the decimal fraction value of the temperature and allows a higher measurement resolution, as listed in Table 2. The measurement resolution for the remote channel is 0.0625°C, and is not adjustable. The measurement resolution for the local channel is adjustable, and can be set for either 0.5°C, 0.25°C, 0.125°C, or 0.0625°C by setting the RES1 and RES0 bits listed in Table 6.

Table 2. Decimal Fraction Temperature Data Format (Local and Remote Temperature Low Bytes)

TEMP (°C) REMOTE TEMPERATURE REGISTER LOW BYTE VALUE LOCAL TEMPERATURE REGISTER LOW BYTE VALUE
0.0625°C RESOLUTION 0.5°C RESOLUTION 0.25°C RESOLUTION 0.125°C RESOLUTION 0.0625°C RESOLUTION
STANDARD AND EXTENDED BINARY HEX STANDARD AND EXTENDED BINARY HEX STANDARD AND EXTENDED BINARY HEX STANDARD AND EXTENDED BINARY HEX STANDARD AND EXTENDED BINARY HEX
0.0000 0000 0000 00 0000 0000 00 0000 0000 00 0000 0000 00 0000 0000 00
0.0625 0001 0000 10 0000 0000 00 0000 0000 00 0000 0000 00 0001 0000 10
0.1250 0010 0000 20 0000 0000 00 0000 0000 00 0010 0000 20 0010 0000 20
0.1875 0011 0000 30 0000 0000 00 0000 0000 00 0010 0000 20 0011 0000 30
0.2500 0100 0000 40 0000 0000 00 0100 0000 40 0100 0000 40 0100 0000 40
0.3125 0101 0000 50 0000 0000 00 0100 0000 40 0100 0000 40 0101 0000 50
0.3750 0110 0000 60 0000 0000 00 0100 0000 40 0110 0000 60 0110 0000 60
0.4375 0111 0000 70 0000 0000 00 0100 0000 40 0110 0000 60 0111 0000 70
0.5000 1000 0000 80 1000 0000 80 1000 0000 80 1000 0000 80 1000 0000 80
0.5625 1001 0000 90 1000 0000 80 1000 0000 80 1000 0000 80 1001 0000 90
0.6250 1010 0000 A0 1000 0000 80 1000 0000 80 1010 0000 A0 1010 0000 A0
0.6875 1011 0000 B0 1000 0000 80 1000 0000 80 1010 0000 A0 1011 0000 B0
0.7500 1100 0000 C0 1000 0000 80 1100 0000 C0 1100 0000 C0 1100 0000 C0
0.8125 1101 0000 D0 1000 0000 80 1100 0000 C0 1100 0000 C0 1101 0000 D0
0.8750 1110 0000 E0 1000 0000 80 1100 0000 C0 1110 0000 E0 1110 0000 E0
0.9375 1111 0000 F0 1000 0000 80 1100 0000 C0 1110 0000 E0 1111 0000 F0

Device Functional Modes

Shutdown Mode (SD)

The TMP411 shutdown mode saves maximum power by shutting down all device circuitry other than the serial interface, which reduces current consumption to typically less than 3 μA; see Figure 10. Shutdown mode is enabled when the shutdown bit (SD) of the Configuration Register is high; the device shuts down once the current conversion is completed. When shutdown is low, the device maintains a continuous conversion state.

One-Shot Conversion

When the TMP411 is in shutdown mode (SD = 1 in the Configuration Register), a single conversion on both channels starts by writing any value to the One-Shot Start Register (pointer address 0Fh). This write operation starts one conversion, and the TMP411 device returns to shutdown mode when the conversion is complete. The value of the data sent in the write command is irrelevant, and is not stored by the TMP411. When the TMP411 is in shutdown mode, an initial 200 μs is required before a one-shot command is given.

NOTE

When a shutdown command is issued, the TMP411 device completes the current conversion before shutting down. The wait time only applies to the 200 μs immediately following shutdown. One-shot commands can be issued without delay thereafter.

Programming

Serial Interface

The TMP411 operates only as a slave device on either the two-wire bus or the SMBus. Connections to either bus are made through the SDA and SCL open-drain I/O lines. The SDA and SCL pins feature integrated spike suppression filters and Schmitt triggers that minimize the effects of input spikes and bus noise. The TMP411 supports the transmission protocol for fast (1 kHz to 400 kHz) and high-speed (1 kHz to 3.4 MHz) modes. All data bytes are transmitted with the MSB first.

Bus Overview

The TMP411 is SMBus interface-compatible. In SMBus protocol, the device that initiates the transfer is a master, and the master controls devices known as slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions.

To address a specific device, a START condition is initiated. START is indicated by pulling the data line (SDA) from a high to low logic level while the SCL line is high. All slaves on the bus shift are in the slave address byte, with the last bit indicating if a read or write operation is needed. During the ninth clock pulse, the slave that is addressed responds to the master by generating an acknowledge bit and pulling the SDA line low.

Data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During data transfer, the SDA line must remain stable while the SCL is high. A change in the SDA while the SCL is high is interpreted as a control signal.

Once all data transfers, the master generates a STOP condition. STOP is indicated by pulling the SDA line from low to high, while the SCL line is high.

Timing Diagrams

The TMP411 is two-wire and SMBus-compatible. Figure 12 to Figure 16 describe the various operations on the TMP411. Parameters for Figure 12 are defined in the Timing Requirements section. Bus definitions are given below:

Bus Idle: Both SDA and SCL lines remain high.

Start Data Transfer: A change in the state of the SDA line, from high to low (while the SCL line is high) defines a START condition. A START condition initiates each data transfer.

Stop Data Transfer: A change in the state of the SDA line from low to high (while the SCL line is high) defines a STOP condition. A STOP or repeated START condition terminates each data transfer.

Data Transfer: The number of data bytes transferred between a START and a STOP condition is not limited and is determined by the master device. The receiver acknowledges the data transfer.

Acknowledge: Each receiving device (when addressed) is required to generate an acknowledge bit. A device that acknowledges must pull the SDA line down during the acknowledge clock pulse so the SDA line is stable and low during the high period of the acknowledge clock pulse. Setup and hold times must be taken into account. On a master receive, the master signals data transfer termination by generating a not-acknowledge bit transmitted by the slave.

TMP411 Fig_13_SBOS383D.gif Figure 12. Two-Wire Timing Diagram
TMP411 Fig_14_SBOS383D.gif
Slave address 1001100 (TMP411A) shown. Slave address changes for TMP411B and TMP411C. See Ordering Information table for more details.
Figure 13. Two-Wire Timing Diagram for Write Word Format
TMP411 Fig_15_SBOS383D.gif
Slave address 1001100 (TMP411A) shown. Slave address changes for TMP411B and TMP411C. See Ordering Information table for more details.
Master must leave the SDA high to terminate a single−byte read operation.
Figure 14. Two-Wire Timing Diagram for Single-Byte Read Format
TMP411 timingdiagramtwobyteread.gif
Slave address 1001100 (TMP411A) is shown. Slave address changes for TMP411B and TMP411C. See Ordering Information table for more details.
Master must leave SDA high to terminate a two−byte read operation.
Figure 15. Two-Wire Timing Diagram for Two-Byte Read Format
TMP411 Fig_16_SBOS383D.gif
Slave address 1001100 (TMP411A) is shown. Slave address changes for TMP411B and TMP411C. See Ordering Information table for more details.
Figure 16. Timing Diagram for SMBus Alert
TMP411 Fig_18_SBOS383D.gif Figure 17. SMBus Alert Timing Diagram

Serial Bus Address

To communicate with the TMP411, the master must first address slave devices through a slave address byte. The slave address byte consists of seven address bits and a direction bit that indicates whether the operation is read or write. The address of the TMP411A is 4Ch (1001100b). The address of the TMP411B is 4Dh (1001101b). The address of the TMP411E is 4Ch (1001100b).

Read and Write Operations

To access a particular register on the TMP411, the appropriate value must be written to the Pointer Register. With the read and write bit low, the value for the Pointer Register is the first byte transferred after the slave address byte. Every write operation to the TMP411 requires a value for the Pointer Register, as shown in Figure 13.

When reading from the TMP411, the last value stored in the Pointer Register by a write operation determines which register is read by a read operation. A new value must be written to the Pointer Register to change the register pointer for a read operation. This transaction is accomplished by issuing a slave address byte with the read and write bit low, followed by the Pointer Register byte. No additional data is required. The master then generates a START condition and sends the slave address byte with the read and write bit high to initiate the read command. See Figure 14 for details of this sequence. If repeated reads from the same register are desired, it is not necessary to continually send the Pointer Register bytes, because the TMP411 device retains the Pointer Register value until the next write operation changes the value. Note that the MSB sends the register bytes first, followed by the LSB.

Timeout Function

When bit 7 of the Consecutive Alert Register is set high, the TMP411 timeout function is enabled. The TMP411 device resets the serial interface if the SCL or SDA lines are held low for 30 ms (typical) between a START and STOP condition. If the TMP411 device is holding the bus low, the device releases the bus and waits for a START condition. To avoid activating the timeout function, it is necessary to maintain a communication speed of at least 1 kHz for the SCL operating frequency. The default state of the timeout function is enabled (bit 7 = high).

High-Speed Mode

For the two-wire bus to operate at frequencies above 400 kHz, the master device must issue a high-speed mode (Hs-mode) master code (00001XXX) as the first byte after a START condition to switch the bus to high-speed operation. The TMP411 device does not acknowledge this byte, but switches the input filters on the SDA and SCL lines, switches the output filter on SDA to operate in Hs-mode, which allows transfers at up to 3.4 MHz. After the Hs-mode master code is issued, the master transmits a two-wire slave address to initiate a data transfer operation. The bus operates in high-speed mode until a STOP condition occurs on the bus. The TMP411 switches the input and output filter after receiving the STOP condition.

General Call Reset

The TMP411 device supports reset through the two-wire general call address 00h (0000 0000b). The TMP411 device reads the general call address and responds to the second byte. If the second byte is 06h (0000 0110b), the TMP411 executes a software reset. The software reset restores the power-on-reset state to all TMP411 registers, aborts any conversion in progress, and clears the ALERT and THERM pins. The TMP411 does not respond to other values in the second byte.

Software Reset

The TMP411 resets by writing any value to Pointer Register FCh. This restores the power-on-reset state to all of the TMP411 registers, aborts any conversion in process, and clears the ALERT and THERM pins.

SMBus Alert Function

The TMP411 device supports the SMBus alert function. When pin 6 is configured as an alert output, the ALERT pin of the TMP411 can connect as an SMBus alert signal. When a master detects an alert condition on the ALERT line, the master sends an SMBus alert command (00011001) on the bus. If the ALERT pin of the TMP411 is active, the device acknowledges the SMBus alert command and returns the slave address on the SDA line. The eighth bit of the slave address byte indicates if the high limit or low limit temperature settings caused the alert condition. The bit is high if the temperature is greater than or equal to one of the temperature high limit settings; the bit is low if the temperature is less than one of the temperature low limit settings. See Figure 16 for details of this sequence.

If multiple devices on the bus respond to the SMBus alert command, arbitration during the slave address portion of the SMBus alert command determines which device clears the alert status. If the TMP411 wins the arbitration, the ALERT pin inactivates when the SMBus alert command is complete. If the TMP411 device loses the arbitration, the ALERT pin remains active.

Register Map

Table 3. Register Map Summary

POINTER ADDRESS (HEX) POWER-ON-RESET (HEX) BIT DESCRIPTION REGISTER DESCRIPTIONS
READ WRITE D7 D6 D5 D4 D3 D2 D1 D0
00 NA (1) 00 LT11 LT10 LT9 LT8 LT7 LT6 LT5 LT4 Local Temperature (High Byte)
01 NA 00 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 Remote Temperature (High Byte)
02 NA XX BUSY LHIGH LLOW RHIGH RLOW OPEN RTHRM LTHRM Status Register
03 09 00 MASK1 SD AL/TH 0 0 RANGE 0 0 Configuration Register
04 0A 08 0 0 0 0 R3 R2 R1 R0 Conversion Rate Register
05 0B 55 LTH11 LTH10 LTH9 LTH8 LTH7 LTH6 LTH5 LTH4 Local Temperature High Limit (High Byte)
06 0C 00 LTL11 LTL10 LTL9 LTL8 LTL7 LTL6 LTL5 LTL4 Local Temperature Low Limit (High Byte)
07 0D 55 RTH11 RTH10 RTH9 RTH8 RTH7 RTH6 RTH5 RTH4 Remote Temperature High Limit (High Byte)
08 0E 00 RTL11 RTL10 RTL9 RTL8 RTL7 RTL6 RTL5 RTL4 Remote Temperature :Low Limit (High Byte)
NA 0F XX X (2) X X X X X X X One-Shot Start
10 NA 00 RT3 RT2 RT1 RT0 0 0 0 0 Remote Temperature (Low Byte)
11 11 00 RTOS11 RTOS10 RTOS9 RTOS8 RTOS7 RTOS6 RTOS5 RTOS4 Remote Temperature Offset Register (High Byte) (3)
12 12 00 RTOS3 RTOS2 RTOS1 RTOS0 0 0 0 0 Remote Temperature Offset Register (Low Byte)(3)
13 13 00 RTH3 RTH2 RTH1 RTH0 0 0 0 0 Remote Temperature High Limit (Low Byte)
14 14 00 RTL3 RTL2 RTL1 RTL0 0 0 0 0 Remote Temperature Low Limit (Low Byte)
15 NA 00 LT3 LT2 LT1 LT0 0 0 0 0 Local Temperature (Low Byte)
16 16 00 LTH3 LTH2 LTH1 LTH0 0 0 0 0 Local Temperature HIgh Limit (Low Byte)
17 17 00 LTL3 LTL2 LTL1 LTL0 0 0 0 0 Local Temperature Low Limit (Low Byte)
18 18 00 NC7 NC6 NC5 NC4 NC3 NC2 NC1 NC0 N-factor correction
19 19 55 RTHL11 RTHL10 RTHL9 RTHL8 RTHL7 RTHL6 RTHL5 RTHL4 Remote THERM Limit
1A 1A 1C 0 0 0 1 1 1 RES1 RES0 Resolution Register
20 20 55 LTHL11 LTHL10 LTHL9 LTHL8 LTHL7 LTHL6 LTHL5 LTHL4 Local THERM Limit
21 21 0A TH11 TH10 TH9 TH8 TH7 TH6 TH5 TH4 THERM Hysteresis
22 22 81 TO_EN 0 0 0 C2 C1 C0 0 Consecutive Alert Register
30 30 FF LMT11 LMT10 LMT9 LMT8 LMT7 LMT6 LMT5 LMT4 Local Temperature Minimum (High Byte)
31 31 F0 LMT3 LMT2 LMT1 LMT0 0 0 0 0 Local Temperature Minimum (Low Byte)
32 32 00 LXT11 LXT10 LXT9 LXT8 LXT7 LXT6 LXT5 LXT4 Local Temperature Maximum (High Byte)
33 33 00 LXT3 LXT2 LXT1 LXT0 0 0 0 0 Local Temperature Maximum (Low Byte)
34 34 FF RMT11 RMT10 RMT9 RMT8 RMT7 RMT6 RMT5 RMT4 Remote Temperature Minimum (High Byte)
35 35 F0 RTM3 RTM2 RTM1 RTM0 0 0 0 0 Remote Temperature Minimum (Low Byte)
36 36 00 RXT11 RXT10 RXT9 RXT8 RXT7 RXT6 RXT5 RXT4 Remote Temperature Maximum (High Byte)
37 37 00 RXT3 RXT2 RXT1 RXT0 0 0 0 0 Remote Temperature Maximum (Low Byte)
NA FC XX X (2) X X X X X X X Software Reset
FE NA 55 0 1 0 1 0 1 0 1 Manufacturer ID
FF NA 12 0 0 0 1 0 0 1 0 Device ID for TMP411A
FF NA 13 0 0 0 1 0 0 1 1 Device ID for TMP411B
FF NA 10 0 0 0 1 0 0 0 0 Device ID for TMP411C
FF NA 12 0 0 0 1 0 0 1 0 Device ID for TMP411E
NA = not applicable; register is write- or read-only.
X = indeterminable state.
Offset registers 11 and 12 are only available for the TMP411E device.

Register Information

The TMP411 contains multiple registers for holding configuration information, temperature measurement results, maximum and minimum temperature comparator limits, and status information. These registers are described in Figure 18 and Table 3.

Pointer Register

Figure 18 shows the internal register structure of the TMP411 . The 8-bit pointer register addresses a given data register. The Pointer Register identifies which of the data registers must respond to a read or write command on the two-wire bus. This register is set with every write command. A write command must be issued to set the proper value in the pointer register before executing a read command. Table 3 lists the pointer address of the registers available in the TMP411 . Offset registers 11 and 12 are only available for the TMP411E device . The power-on-reset (POR) value of the Pointer Register is 00h (0000 0000b).

TMP411 ai_int_reg_strct_bos686.gif Figure 18. Internal Register Structure

Temperature Registers

The TMP411 has four 8-bit registers that hold temperature measurement results. The local and remote channels have a high byte register that contains the most significant bits (MSBs) of the temperature analog-to-digital converter (ADC) result and a low byte register that contains the least significant bits (LSBs) of the temperature ADC result. The local channel high byte address is 00h; the local channel low byte address is 15h. The remote channel high byte is at address 01h; the remote channel low byte address is 10h. These registers are read-only and are updated by the ADC each time a temperature measurement is completed.

The TMP411 contains circuitry to assure that a low byte register read command returns data from the same ADC conversion as the immediately preceding high byte read command. This assurance remains valid only until another register is read. For proper operation, the high byte of a temperature register must be read first. The low byte register must be read in the next read command. The low byte register may be left unread if the LSBs are not needed. The temperature registers may be read as a 16-bit register using a single two-byte read command from address 00h for the local channel result, or from address 01h for the remote channel result. The high byte is read output first, followed by the low byte. Both bytes of this read operation are from the same ADC conversion. The power-on-reset value of both temperature registers is 00h.

Limit Registers

The TMP411 has 11 registers for setting comparator limits for the local and remote measurement channels. These registers have read and write capability. The High and Low Limit Registers for both channels span two registers, as do the temperature registers. The local temperature high limit is set by writing the high byte to pointer address 0Bh, writing the low byte to pointer address 16h, or by using a single two-byte write command (high byte first) to pointer address 0Bh. The local temperature high limit is read by the high byte from pointer address 05h, the low byte from pointer address 16h, or by using a two-byte read command from pointer address 05h. The power-on-reset value of the local temperature high limit is 55h or 00h. The power-on-reset value of the local temperature high limit is 55h or 00h (85°C in standard temperature mode and 21°C in extended temperature mode).

Similarly, the local temperature low limit is set by writing the high byte to pointer address 0Ch, writing the low byte to pointer address 17h, or by using a single two-byte write command to pointer address 0Ch. The local temperature low limit is read by the high byte from pointer address 06h, the low byte from pointer address 17h, or by using a two-byte read from pointer address 06h. The power-on-reset value of the local temperature low limit register is 00h (0°C in standard temperature mode, and −64°C in extended mode).

The remote temperature high limit is set by writing the high byte to pointer address 0Dh, writing the low byte to pointer address 13h, or by using a two-byte write command to pointer address 0Dh. The remote temperature high limit is read by the high byte from pointer address 07h, the low byte from pointer address 13h, or by using a two-byte read command from pointer address 07h. The power-on-reset value of the Remote Temperature High Limit Register is 55h or 00h (85°C in standard temperature mode, and 21°C in extended temperature mode).

The remote temperature low limit is set by writing the high byte to pointer address 0Eh,writing the low byte to pointer address 14h, or by using a two-byte write to pointer address 0Eh. The remote temperature low limit is read by the high byte from pointer address 08h, the low byte from pointer address 14h, or by using a two-byte read from pointer address 08h. The power-on-reset value of the Remote Temperature Low Limit Register is 00h (0°C in standard temperature mode, and −64°C in extended mode).

The TMP411 has a THERM limit register for the local and remote channels. These registers are eight bits and allow for THERM limits to be set to 1°C resolution. The local channel THERM limit is set by writing to pointer address 20h. The remote channel THERM limit is set by writing to pointer address 19h. The local channel THERM limit is read from pointer address 20h, and the remote channel THERM limit is read from pointer address 19h. The power-on-reset value of the THERM limit registers is 55h (85°C in standard temperature mode or 21°C in extended temperature mode). The THERM limit comparators have hysteresis. The hysteresis of the comparators is set by writing to pointer address 21h. The hysteresis value is obtained by reading from pointer address 21h. The Hysteresis Register value is an unsigned number that is always positive. The power-on-reset value of this register is 0Ah (10°C).

When changing between standard and extended temperature ranges, note that the temperatures stored in the temperature limit registers do not automatically reformat to correspond to the new temperature range format. These values must be reprogrammed in the appropriate binary or extended binary format.

Status Register

The TMP411 has a Status Register that reports the state of the temperature comparators. Table 4 lists the Status Register bits. The Status Register is read-only from pointer address 02h.

The BUSY bit reads as 1 if the ADC is making a conversion, and 0 if the ADC is not converting.

The OPEN bit reads as 1 if the remote transistor is detected as OPEN since the last read of the Status Register. The OPEN status is only detected when the ADC is attempting to convert a remote temperature.

The RTHRM bit reads as 1 if the remote temperature exceeds the remote THERM limit, remains greater than the remote THERM limit, and less than the value in the shared Hysteresis Register, as shown in Figure 17.

The LTHRM bit reads as 1 if the local temperature exceeds the local THERM limit, remains greater than the local THERM limit, and less than the value in the shared Hysteresis Register, as shown in Figure 17.

The LHIGH and RHIGH bit values depend on the state of the AL or TH bit in the Configuration Register. If the AL or TH bit is 0, the LHIGH bit reads as 1 if the local high limit was exceeded since the last clearing of the Status Register. The RHIGH bit reads as 1 if the remote high limit was exceeded since the last clearing of the Status Register. If the AL or TH bit is 1, the remote high limit and the local high limit implement a THERM2 function. LHIGH reads as 1 if the local temperature has exceeded the local high limit and remains greater than the local high limit, and less than the value in the Hysteresis Register.

The RHIGH bit reads as 1 if the remote temperature exceeds the remote high limit and remains greater than the remote high limit, and less than the value in the Hysteresis Register.

The LLOW and RLOW bits are not effected by the AL or TH bit. The LLOW bit reads as 1 if the local low limit was exceeded since the last clearing of the Status Register. The RLOW bit reads as 1 if the remote low limit was exceeded since the last clearing of the Status Register.

The values of the LLOW, RLOW, and OPEN (as well as LHIGH and RHIGH when AL or TH is 0) are latched and are read as 1 until the Status Register is read or a device reset occurs. These bits are cleared by reading the Status Register, provided that the condition causing the flag to be set no longer exists. The values of BUSY, LTHRM, and RTHRM (as well as LHIGH and RHIGH when ALERT or THERM2 is 1) are not latched and are not cleared by reading the Status Register. The values indicate the current state, and are updated appropriately at the end of the corresponding ADC conversion. Clearing the Status Register bits does not clear the state of the ALERT pin. An SMBus alert response address command must clear the ALERT pin.

The TMP411 NORs LHIGH, LLOW, RHIGH, RLOW, and OPEN, so a status change for any of these flags from 0 to 1 automatically causes the ALERT pin to go low. (This only applies when the ALERT or THERM2 pin is configured for ALERT mode).

Table 4. Status Register Format

STATUS REGISTER (READ = 02h, WRITE = NA)
Bit Number D7 D6 D5 D4 D3 D2 D1 D0
Bit Name BUSY LHIGH LLOW RHIGH RLOW OPEN RTHRM LTHRM
POR Value 0 (1) 0 0 0 0 0 0 0
The BUSY bit changes to 1 almost immediately (<< 100 µs) following power-up, as the TMP411 device begins the first temperature conversion. The BUSY bit is high whenever the TMP411 device is converting a temperature reading.

Configuration Register

The Configuration Register sets the temperature range, controls shutdown mode, and determines how the ALERT and THERM2 pins function. The Configuration Register is set by writing to pointer address 09h and by reading from pointer address 03h.

The MASK bit (bit 7) enables or disables the ALERT pin output if AL or TH = 0. If AL or TH = 1, then the MASK bit has no effect. If MASK is set to 0, the ALERT pin goes low when one of the temperature measurement channels exceeds the high or low limits for the selected number of consecutive conversions. If the MASK bit is set to 1, the TMP411 retains the ALERT pin status, but the ALERT pin does not go low.

The shutdown (SD) bit (bit 6) enables or disables the temperature measurement circuitry. If SD = 0, the TMP411 converts continuously at the rate set in the conversion rate register. When SD is set to 1, the TMP411 immediately stops converting and enters shutdown mode. When SD is set to 0 again, the TMP411 resumes continuous conversions. A single conversion starts by writing to the One-Shot Register when SD = 1.

The AL or TH bit (bit 5) controls if the ALERT pin functions in ALERT mode or THERM2 mode. If AL or TH = 0, the ALERT pin operates as an interrupt pin. In this mode, the ALERT pin goes low after the set number of consecutive out-of-limit temperature measurements occur.

If AL or TH = 1, the ALERT /THERM2 pin implements a THERM function (THERM2). In this mode, THERM2 functions similarly to the THERM pin, except that the local high limit and remote high limit registers are used for the thresholds. THERM2 goes low when RHIGH or LHIGH is set.

The temperature range is set by configuring bit 2 of the Configuration Register. Setting this bit low configures the TMP411 device for the standard measurement range (0°C to 127°C). Temperature conversions are stored in the standard binary format. Setting bit 2 high configures the TMP411 for the extended measurement range (−55°C to +150°C). Temperature conversions are stored in the extended binary format, as listed in Table 1.

The remaining bits of the Configuration Register are reserved and must be set to 0. The power-on-reset value for this register is 00h. Table 5 lists the Configuration Register bits.

Table 5. Configuration Register Bit Descriptions

CONFIGURATION REGISTER (READ = 03h, WRITE = 09h, POR = 00h)
BIT NAME FUNCTION POWER-ON-RESET VALUE
7 MASK

0 = ALERT enabled

1 = ALERT masked

0
6 SD

0 = Run

1 = Shutdown

0
5 AL or TH

0 = ALERT mode

1 = THERM mode

0
4, 3 Reserved 0
2 Temperature range

0 = 0°C to 127°C

1 = –55°C to 150°C

0
1, 0 Reserved 0

Resolution Register

The RES1 and RES0 bits (resolution bits 1 and 0) of the Resolution Register set the resolution of the local temperature measurement channel. Remote temperature measurement channel resolution is not effected. Changing the local channel resolution affects the conversion time and rate of the TMP411. The Resolution Register is set by writing to pointer address 1Ah, and is read from pointer address 1Ah. Table 6 lists the resolution bits for the Resolution Register.

Table 6. Resolution Register: Local Channel Programmable Resolution

RESOLUTION REGISTER (READ = 1Ah, WRITE = 1Ah, POR = 1Ch)
RES1 RES0 RESOLUTION CONVERSION TIME (TYPICAL)
0 0 9 Bits (0.5°C) 12.5 ms
0 1 10 Bits (0.25°C) 25 ms
1 0 11 Bits (0.125°C) 50 ms
1 1 12 Bits (0.0625°C) 100 ms

Bits 2 through 4 of the resolution register must be set to 1. Bits 5 through 7 of the resolution register must be set to 0. The power-on-reset value of this register is 1Ch.

Conversion Rate Register

The Conversion Rate Register controls the rate at which temperature conversions are performed. The register adjusts the idle time between conversions but not the conversion timing itself, which allows the TMP411 power dissipation to balance with the temperature register update rate. Table 7 lists the conversion rate options and corresponding current consumption.

Table 7. Conversion Rate Register

CONVERSION RATE REGISTER (READ = 04h, WRITE = 0Ah, POR = 08h
R7 R6 R5 R4 R3 R2 R1 R0 CONVERSIONS PER SECOND AVERAGE IQ (TYPICAL)
(µA)
VS = 2.7 V VS = 5.5 V
0 0 0 0 0 0 0 0 0.0625 11 32
0 0 0 0 0 0 0 1 0.125 17 38
0 0 0 0 0 0 1 0 0.25 28 49
0 0 0 0 0 0 1 1 0.5 47 69
0 0 0 0 0 1 0 0 1 80 103
0 0 0 0 0 1 0 1 2 128 155
0 0 0 0 0 1 1 0 4 190 220
07h to 0Fh 8 373 413

N-Factor Correction Register

The TMP411 allows for a different n-factor value to convert remote channel measurements to temperature. The remote channel uses sequential current excitation to extract a differential VBE voltage measurement to determine the temperature of the remote transistor. Equation 1 relates the voltage and temperature.

Equation 1. TMP411 Equation_1_SBOS383D.gif

The value n in 1 is a characteristic of the particular transistor used for the remote channel. The default value for the TMP411 is n = 1.008. The value in the Table 8 adjusts the effective n-factor according to Equation 2 and Equation 3:

Equation 2. TMP411 Equation_2_SBOS383D.gif
Equation 3. TMP411 Equation_3_SBOS383D.gif

The n-correction value must be stored in two’s-complement format, yielding an effective data range from −128 to 127, as listed in Table 8. The n-correction value is written to and read from pointer address 18h. The register power-on-reset value is 00h, which is not effected unless the value is written to.

Table 8. N-Factor Range

NADJUST N
BINARY HEX DECIMAL
01111111 7F 127 1.747977
00001010 0A 10 1.042759
00001000 08 8 1.035616
00000110 06 6 1.028571
00000100 04 4 1.021622
00000010 02 2 1.014765
00000001 01 1 1.011371
00000000 00 0 1.008
11111111 FF –1 1.004651
11111110 FE –2 1.001325
11111100 FC –4 0.994737
11111010 FA –6 0.988235
11111000 F8 –8 0.981818
11110110 F6 –10 0.975484
10000000 80 –128 0.706542

Minimum and Maximum Registers

The TMP411 stores the measured minimum and maximum temperatures since power-on, chip-reset, or minimum and maximum register reset for the local and remote channels. The Local Temperature Minimum Register is read with the high byte from pointer address 30h, and the low byte is read from pointer address 31h. The Local Temperature Minimum Register is read with a two-byte read command from pointer address 30h. The Local Temperature Minimum Register resets at power-on by executing the chip-reset command, or by writing any value to any of the pointer addresses 30h through 37h. The reset value for these registers is FFh and F0h.

The Local Temperature Maximum Register is read with the high byte from pointer address 32h, and the low byte is read from pointer address 33h. The Local Temperature Maximum Register is read with a two-byte read command from pointer address 32h. The Local Temperature Maximum Register resets at power-on by executing the chip reset command, or by writing any value to any of the pointer addresses 30h through 37h. The reset value for these registers is 00h and 00h.

The Remote Temperature Minimum Register is read with the high byte from pointer address 34h, and the low byte is read from pointer address 35h. The Remote Temperature Minimum Register is read with a two-byte read command from pointer address 34h. The Remote Temperature Minimum Register resets at power-on by executing the chip reset command, or by writing any value to any of the pointer addresses 30h through 37h. The reset value for these registers is FFh and F0h.

The Remote Temperature Maximum Register is read with the high byte from pointer address 36h and the low byte is read from pointer address 37h. The Remote Temperature Maximum Register is read with a two-byte read command from pointer address 36h. The Remote Temperature Maximum Register resets at power-on by executing the chip reset command, or by writing any value to any of the pointer addresses 30h through 37h. The reset value for these registers is 00h and 00h.

Consecutive Alert Register

The value in the Consecutive Alert Register (address 22h) determines how many consecutive out-of-limit measurements must occur on a measurement channel before the ALERT signal is activated. The value in this register does not effect bits in the Status Register. Values of one, two, three, or four consecutive conversions can be selected; one conversion is the default. The function allows additional filtering for the ALERT pin. The consecutive alert bits are listed in Table 9:

Table 9. Consecutive Alert Register

CONSECUTIVE ALERT REGISTER (READ = 22h, WRITE = 22h, POR = 01h)
C2 C1 C0 NUMBER OF CONSECUTIVE OUT OF LIMIT MEASUREMENTS
0 0 0 1
0 0 1 2
0 1 1 3
1 1 1 4

NOTE

Bit 7 of the Consecutive Alert Register controls the enable/disable of the timeout function. See the Timeout Function section for a description of this feature.

THERM Hysteresis Register

The THERM Hysteresis Register, shown in Table 11, stores the hysteresis value for the THERM pin alarm function. This register must be programmed with a value that is less than the Local Temperature High Limit Register value, Remote Temperature High Limit Register value, Local THERM Limit Register value, or Remote THERM Limit Register value, otherwise the respective temperature comparator does not trip on the falling edges of the measured temperature. Permitted hysteresis values are listed in Table 10. The default hysteresis value is 10°C, whether the device is operating in the standard or extended mode setting.

Table 10. Allowable THERM Hysteresis Values

TEMPERATURE (°C) THERM HYSTERESIS VALUES
TH [11:1]
(STANDARD BINARY)
(HEX)
0 0000 0000 00
1 0000 0001 01
5 0000 0101 05
10 0000 1010 0A
25 0001 1001 19
50 0011 0010 32
75 0100 1011 4B
100 0110 0100 64
125 0111 1101 7D
127 0111 1111 7F
150 1001 0110 96
175 1010 1111 AF
200 1100 1000 C8
225 1110 0001 E1
255 1111 1111 FF

Table 11. THERM Hysteresis Register Format

THERM HYSTERESIS REGISTER (READ = 21h, WRITE = 21h, POR = 0Ah)
BIT NUMBER D7 D6 D5 D4 D3 D2 D1 D0
BIT NAME TH11 TH10 TH9 TH8 TH7 TH6 TH5 TH4
POR VALUE 0 0 0 0 1 0 1 0

Remote Temperature Offset Register

The offset register allows the TMP411E to store any system offset compensation value that may result from precision calibration. The value in the register is stored in the same format as the temperature result, and is added to the remote temperature result after each conversion. Combined with the η-factor correction, the function allows for an accurate system calibration over the entire temperature range.

Identification Registers

The TMP411 allows for the two-wire bus controller to query the device for manufacturer and device identification. This feature allows for software identification of the device at the particular two-wire bus address. The manufacturer identification is obtained by reading from pointer address FEh. The TMP411 manufacturer code is 55h. The device identification depends on the specific model, as listed in Table 3. These registers are read-only.