126.96.36.199.1 PCB Layout and Component Guidelines
For optimal performance the application board layout and component selection is important. The list that follows is a high-level guideline for laying out the DC-DC circuit.
- TI recommends star-connecting VDDIO_SW and VDDIO to the same 3.3-V supply.
- All external components should be placed as close to the pins as possible.
- The loop formed by the VDDIO_SW, input capacitor (CVDDIO_SW), and VSS_SW must be as short as possible.
- The feedback trace must be as short as possible and kept away from any noise source such as the switching output (VSW).
- It is necessary to have a separate island or surgical cut in the ground plane for the input cap (CVDDIO_SW) and VSS_SW.
- A VDD plane is recommended for connecting the VDD node to the LVSW-CVDD point to minimize parasitic resistance and inductance.