5.5.3 Reducing Current Consumption
All C2000™ microcontrollers provide some methods to reduce the device current consumption:
- Either of the two low-power modes—IDLE and HALT—could be entered to reduce the current consumption even further during idle periods in the application.
- The flash module may be powered down if the code is run from RAM.
- Disable the pullups on pins that assume an output function.
- Each peripheral has an individual clock-enable bit (PCLKCRx). Reduced current consumption may be achieved by turning off the clock to any peripheral that is not used in a given application. Table 5-4 lists the typical current consumption value per peripheral at 100-MHz SYSCLK.
- To realize the lowest VDDA current consumption in an LPM, see the respective analog chapter of the TMS320F28004x Microcontrollers Technical Reference Manual to ensure each module is powered down as well.
Table 5-4 Typical IDD Current Reduction per Disabled Peripheral (at 100-MHz SYSCLK)(1)
PERIPHERAL |
IDD CURRENT REDUCTION (mA) |
ADC(2) |
0.8 |
CAN |
1.1 |
CLA |
0.4 |
CLB |
1.1 |
CMPSS(2) |
0.4 |
CPU TIMER |
0.1 |
DAC(2) |
0.2 |
DMA |
0.5 |
eCAP1 to eCAP5 |
0.1 |
eCAP6 to eCAP7(3) |
0.4 |
ePWM |
0.7 |
eQEP |
0.1 |
FSI |
0.7 |
HRPWM |
0.8 |
I2C |
0.3 |
LIN |
0.4 |
PGA(2) |
0.2 |
PMBUS |
0.3 |
SCI |
0.2 |
SDFM |
0.9 |
SPI |
0.2 |
DCC |
0.1 |
PLL at 100 MHz |
22.9 |