SPRS698H November 2010 – March 2020 TMS320F28062 , TMS320F28062F , TMS320F28063 , TMS320F28064 , TMS320F28065 , TMS320F28066 , TMS320F28067 , TMS320F28068F , TMS320F28068M , TMS320F28069 , TMS320F28069F , TMS320F28069M
The devices support three masked external interrupts (XINT1–XINT3). Each of the interrupts can be selected for negative, positive, or both negative and positive edge triggering and can also be enabled or disabled. These interrupts also contain a 16-bit free-running up counter, which is reset to zero when a valid interrupt edge is detected. This counter can be used to accurately time-stamp the interrupt. There are no dedicated pins for the external interrupts. XINT1, XINT2, and XINT3 interrupts can accept inputs from GPIO0–GPIO31 pins.