SPRS698G November   2010  – May 2018 TMS320F28062 , TMS320F28063 , TMS320F28064 , TMS320F28065 , TMS320F28066 , TMS320F28067 , TMS320F28069

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
    5. 1.5 System Device Diagram
  2. 2Revision History
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagrams
    2. 4.2 Signal Descriptions
      1. Table 4-1 Signal Descriptions
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings – Commercial
    3. 5.3  ESD Ratings – Automotive
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Power Consumption Summary
      1. Table 5-1 TMS320F2806x Current Consumption at 90-MHz SYSCLKOUT
      2. 5.5.1      Reducing Current Consumption
      3. 5.5.2      Current Consumption Graphs (VREG Enabled)
    6. 5.6  Electrical Characteristics
    7. 5.7  Thermal Resistance Characteristics
      1. 5.7.1 PFP PowerPAD Package
      2. 5.7.2 PZP PowerPAD Package
      3. 5.7.3 PN Package
      4. 5.7.4 PZ Package
    8. 5.8  Thermal Design Considerations
    9. 5.9  Emulator Connection Without Signal Buffering for the MCU
    10. 5.10 Parameter Information
      1. 5.10.1 Timing Parameter Symbology
      2. 5.10.2 General Notes on Timing Parameters
    11. 5.11 Test Load Circuit
    12. 5.12 Power Sequencing
      1. Table 5-3 Reset (XRS) Timing Requirements
      2. Table 5-4 Reset (XRS) Switching Characteristics
    13. 5.13 Clock Specifications
      1. 5.13.1 Device Clock Table
        1. Table 5-5 2806x Clock Table and Nomenclature (90-MHz Devices)
        2. Table 5-6 Device Clocking Requirements/Characteristics
        3. Table 5-7 Internal Zero-Pin Oscillator (INTOSC1/INTOSC2) Characteristics
      2. 5.13.2 Clock Requirements and Characteristics
        1. Table 5-8   XCLKIN Timing Requirements – PLL Enabled
        2. Table 5-9   XCLKIN Timing Requirements – PLL Disabled
        3. Table 5-10 XCLKOUT Switching Characteristics (PLL Bypassed or Enabled)
    14. 5.14 Flash Timing
      1. Table 5-11 Flash/OTP Endurance for T Temperature Material
      2. Table 5-12 Flash/OTP Endurance for S Temperature Material
      3. Table 5-13 Flash/OTP Endurance for Q Temperature Material
      4. Table 5-14 Flash Parameters at 90-MHz SYSCLKOUT
      5. Table 5-15 Flash/OTP Access Timing
      6. Table 5-16 Flash Data Retention Duration
  6. 6Detailed Description
    1. 6.1 Overview
      1. 6.1.1  CPU
      2. 6.1.2  Control Law Accelerator (CLA)
      3. 6.1.3  Viterbi, Complex Math, CRC Unit (VCU)
      4. 6.1.4  Memory Bus (Harvard Bus Architecture)
      5. 6.1.5  Peripheral Bus
      6. 6.1.6  Real-Time JTAG and Analysis
      7. 6.1.7  Flash
      8. 6.1.8  M0, M1 SARAMs
      9. 6.1.9  L4 SARAM, and L0, L1, L2, L3, L5, L6, L7, and L8 DPSARAMs
      10. 6.1.10 Boot ROM
        1. 6.1.10.1 Emulation Boot
        2. 6.1.10.2 GetMode
        3. 6.1.10.3 Peripheral Pins Used by the Bootloader
      11. 6.1.11 Security
      12. 6.1.12 Peripheral Interrupt Expansion (PIE) Block
      13. 6.1.13 External Interrupts (XINT1 to XINT3)
      14. 6.1.14 Internal Zero Pin Oscillators, Oscillator, and PLL
      15. 6.1.15 Watchdog
      16. 6.1.16 Peripheral Clocking
      17. 6.1.17 Low-power Modes
      18. 6.1.18 Peripheral Frames 0, 1, 2, 3 (PFn)
      19. 6.1.19 General-Purpose Input/Output (GPIO) Multiplexer
      20. 6.1.20 32-Bit CPU-Timers (0, 1, 2)
      21. 6.1.21 Control Peripherals
      22. 6.1.22 Serial Port Peripherals
    2. 6.2 Memory Maps
    3. 6.3 Register Maps
    4. 6.4 Device Emulation Registers
    5. 6.5 VREG, BOR, POR
      1. 6.5.1 On-chip VREG
        1. 6.5.1.1 Using the On-chip VREG
        2. 6.5.1.2 Disabling the On-chip VREG
      2. 6.5.2 On-chip Power-On Reset (POR) and Brownout Reset (BOR) Circuit
    6. 6.6 System Control
      1. 6.6.1 Internal Zero Pin Oscillators
      2. 6.6.2 Crystal Oscillator Option
      3. 6.6.3 PLL-Based Clock Module
      4. 6.6.4 USB and HRCAP PLL Module (PLL2)
      5. 6.6.5 Loss of Input Clock (NMI Watchdog Function)
      6. 6.6.6 CPU-Watchdog Module
    7. 6.7 Low-power Modes Block
    8. 6.8 Interrupts
      1. 6.8.1 External Interrupts
        1. 6.8.1.1 External Interrupt Electrical Data/Timing
          1. Table 6-20 External Interrupt Timing Requirements
          2. Table 6-21 External Interrupt Switching Characteristics
    9. 6.9 Peripherals
      1. 6.9.1  CLA Overview
      2. 6.9.2  Analog Block
        1. 6.9.2.1 Analog-to-Digital Converter (ADC)
          1. 6.9.2.1.1 Features
          2. 6.9.2.1.2 ADC Start-of-Conversion Electrical Data/Timing
            1. Table 6-26 External ADC Start-of-Conversion Switching Characteristics
          3. 6.9.2.1.3 On-Chip Analog-to-Digital Converter (ADC) Electrical Data/Timing
            1. Table 6-27 ADC Electrical Characteristics
            2. Table 6-28 ADC Power Modes
            3. 6.9.2.1.3.1 Internal Temperature Sensor
              1. Table 6-29 Temperature Sensor Coefficient
            4. 6.9.2.1.3.2 ADC Power-Up Control Bit Timing
              1. Table 6-30 ADC Power-Up Delays
            5. 6.9.2.1.3.3 ADC Sequential and Simultaneous Timings
        2. 6.9.2.2 ADC MUX
        3. 6.9.2.3 Comparator Block
          1. 6.9.2.3.1 On-Chip Comparator/DAC Electrical Data/Timing
            1. Table 6-32 Electrical Characteristics of the Comparator/DAC
      3. 6.9.3  Detailed Descriptions
      4. 6.9.4  Serial Peripheral Interface (SPI) Module
        1. 6.9.4.1 SPI Master Mode Electrical Data/Timing
          1. Table 6-35 SPI Master Mode External Timing (Clock Phase = 0)
          2. Table 6-36 SPI Master Mode External Timing (Clock Phase = 1)
        2. 6.9.4.2 SPI Slave Mode Electrical Data/Timing
          1. Table 6-37 SPI Slave Mode External Timing (Clock Phase = 0)
          2. Table 6-38 SPI Slave Mode External Timing (Clock Phase = 1)
      5. 6.9.5  Serial Communications Interface (SCI) Module
      6. 6.9.6  Multichannel Buffered Serial Port (McBSP) Module
        1. 6.9.6.1 McBSP Electrical Data/Timing
          1. 6.9.6.1.1 McBSP Transmit and Receive Timing
            1. Table 6-42 McBSP Timing Requirements
            2. Table 6-43 McBSP Switching Characteristics
          2. 6.9.6.1.2 McBSP as SPI Master or Slave Timing
            1. Table 6-44 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 0)
            2. Table 6-45 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 0)
            3. Table 6-46 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 0)
            4. Table 6-47 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 0)
            5. Table 6-48 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 1)
            6. Table 6-49 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 1)
            7. Table 6-50 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 1)
            8. Table 6-51 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 1)
      7. 6.9.7  Enhanced Controller Area Network (eCAN) Module
      8. 6.9.8  Inter-Integrated Circuit (I2C)
        1. 6.9.8.1 I2C Electrical Data/Timing
          1. Table 6-55 I2C Timing Requirements
          2. Table 6-56 I2C Switching Characteristics
      9. 6.9.9  Enhanced Pulse Width Modulator (ePWM) Modules (ePWM1 to ePWM8)
        1. 6.9.9.1 ePWM Electrical Data/Timing
          1. Table 6-59 ePWM Timing Requirements
          2. Table 6-60 ePWM Switching Characteristics
        2. 6.9.9.2 Trip-Zone Input Timing
          1. Table 6-61 Trip-Zone Input Timing Requirements
      10. 6.9.10 High-Resolution PWM (HRPWM)
        1. 6.9.10.1 HRPWM Electrical Data/Timing
          1. Table 6-62 High-Resolution PWM Characteristics
      11. 6.9.11 Enhanced Capture Module (eCAP1)
        1. 6.9.11.1 eCAP Electrical Data/Timing
          1. Table 6-64 Enhanced Capture (eCAP) Timing Requirement
          2. Table 6-65 eCAP Switching Characteristics
      12. 6.9.12 High-Resolution Capture Modules (HRCAP1 to HRCAP4)
        1. 6.9.12.1 HRCAP Electrical Data/Timing
          1. Table 6-67 High-Resolution Capture (HRCAP) Timing Requirements
      13. 6.9.13 Enhanced Quadrature Encoder Modules (eQEP1, eQEP2)
        1. 6.9.13.1 eQEP Electrical Data/Timing
          1. Table 6-69 Enhanced Quadrature Encoder Pulse (eQEP) Timing Requirements
          2. Table 6-70 eQEP Switching Characteristics
      14. 6.9.14 JTAG Port
      15. 6.9.15 General-Purpose Input/Output (GPIO) MUX
        1. 6.9.15.1 GPIO Electrical Data/Timing
          1. 6.9.15.1.1 GPIO Output Timing
            1. Table 6-76 General-Purpose Output Switching Characteristics
          2. 6.9.15.1.2 GPIO Input Timing
            1. Table 6-77 General-Purpose Input Timing Requirements
          3. 6.9.15.1.3 Sampling Window Width for Input Signals
          4. 6.9.15.1.4 Low-Power Mode Wakeup Timing
            1. Table 6-78 IDLE Mode Timing Requirements
            2. Table 6-79 IDLE Mode Switching Characteristics
            3. Table 6-80 STANDBY Mode Timing Requirements
            4. Table 6-81 STANDBY Mode Switching Characteristics
            5. Table 6-82 HALT Mode Timing Requirements
            6. Table 6-83 HALT Mode Switching Characteristics
      16. 6.9.16 Universal Serial Bus (USB)
        1. 6.9.16.1 USB Electrical Data/Timing
          1. Table 6-84 USB Input Ports DP and DM Timing Requirements
          2. Table 6-85 USB Output Ports DP and DM Switching Characteristics
  7. 7Applications, Implementation, and Layout
    1. 7.1 TI Design or Reference Design
  8. 8Device and Documentation Support
    1. 8.1 Getting Started
    2. 8.2 Device and Development Support Tool Nomenclature
    3. 8.3 Tools and Software
    4. 8.4 Documentation Support
    5. 8.5 Related Links
    6. 8.6 Community Resources
    7. 8.7 Trademarks
    8. 8.8 Electrostatic Discharge Caution
    9. 8.9 Glossary
  9. 9Mechanical, Packaging, and Orderable Information
    1. 9.1 Packaging Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Tools and Software

TI offers an extensive line of development tools. Some of the tools and software to evaluate the performance of the device, generate code, and develop solutions are listed below. To view all available tools and software for C2000™ real-time control MCUs, visit the Tools & software for C2000™ real-time control MCUs page.

Development Tools

InstaSPIN-MOTION (and InstaSPIN-FOC) enabled C2000 Piccolo LaunchPad
The InstaSPIN-MOTION (and InstaSPIN-FOC) enabled C2000™ Piccolo LaunchPad is an inexpensive evaluation platform designed to help you leap right into the world of motor control using the InstaSPIN-MOTION™ or InstaSPIN-FOC™ solution. The LaunchPad is based on the Piccolo TMS320F28069M with unique features such as 256KB of onboard flash, 12-bit ADC, I2C, SPI, UART, CAN, dual Encoder support and InstaSPIN libraries in on-chip execute only ROM memory. The LaunchPad includes many board hardware features such as an integrated isolated XDS100v2 JTAG emulator for easy programming and debugging. The LaunchPad works with various BoosterPacks, but specifically BOOSTXL-DRV8301 and BOOSTXL-DRV8305EVM motor drive BoosterPacks for InstaSPIN-FOC and InstaSPIN-MOTION based systems. With the InstaSPIN™ solutions, either or both of the BoosterPacks can be controlled with a single LaunchPad.

F28069 Piccolo controlCARD
The C2000 controlCARDs from Texas Instruments are ideal products for OEMs to use for initial software development and short-run builds for system prototypes, test stands, and many other projects that require easy access to high-performance controllers. The controlCARDs are complete board-level modules that use an industry-standard DIMM form factor to provide a low-profile, single-board controller solution. All of the C2000 controlCARDs use the same 100-pin connector footprint to provide the analog and digital I/Os onboard controller and are completely interchangeable. The host system must provide only a single 5-V power rail to the controlCARD for it to function fully.

F28069 Piccolo Experimenter Kit
The C2000 experimenter kits from Texas Instruments are ideal products for OEMs to use for initial device exploration and testing. The Piccolo F28069 Experimenter Kit has a docking station that features onboard USB JTAG emulation, access to all controlCARD signals, breadboard areas, and RS-232 and JTAG connectors. Each kit contains an F28069 controlCARD. The controlCARD is a complete board-level module that uses an industry-standard DIMM form factor to provide a low-profile, single-board controller solution. The kit is complete with Code Composer Studio IDE and USB cable.

Software Tools

controlSUITE™ Software Suite: Essential Software and Development Tools for C2000™ Microcontrollers
controlSUITE™ for C2000 microcontrollers is a cohesive set of software infrastructure and software tools designed to minimize software development time.

Code Composer Studio™ (CCS) Integrated Development Environment (IDE) for C2000 Microcontrollers
Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. CCS comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor, project build environment, debugger, profiler, and many other features. The intuitive IDE provides a single user interface taking the user through each step of the application development flow. Familiar tools and interfaces let users get started faster than ever before. CCS combines the advantages of the Eclipse software framework with advanced embedded debug capabilities from TI resulting in a compelling feature-rich development environment for embedded developers.

Pin Mux Tool
The Pin Mux Utility is a software tool which provides a Graphical User Interface for configuring pin multiplexing settings, resolving conflicts and specifying I/O cell characteristics for TI MPUs.

UniFlash Standalone Flash Tool
UniFlash is a standalone tool used to program on-chip flash memory through a GUI, command line, or scripting interface.

Models

Various models are available for download from the product Tools & Software pages. These include I/O Buffer Information Specification (IBIS) Models and Boundary-Scan Description Language (BSDL) Models. To view all available models, visit the Models section of the Tools & Software page for each device, which can be found in Table 8-1.

Training

InstaSPIN-FOC LaunchPad and BoosterPack

This 6-part series provides information about the C2000 InstaSPIN-FOC Motor Control LaunchPad Development Kit and BoosterPack Plug-in Module.

The InstaSPIN-FOC enabled C2000 Piccolo LaunchPad is an inexpensive evaluation platform designed to help you enter the world of sensorless motor control using the InstaSPIN-FOC solution.

C2000™ Architecture and Peripherals
The C2000 family of microcontrollers contains a unique mix of innovative and cutting-edge peripherals along with a very capable C28x core. This video describes the core architecture and every peripheral offered on C2000 devices.