Word Size: 16-bit or 32-bit (McBSPs limited to 16-bit)
Throughput: 4 cycles/word (5 cycles/word for McBSP reads)
A. The ePWM and HRPWM registers must be remapped to PF3 (through bit 0 of the MAPCNF register) before they can be accessed by the DMA. The ePWM or HRPWM connection to DMA is not present in silicon revision 0.