Refer to the PDF data sheet for device specific package drawings
The 2833x and 2823x DSCs incorporate a method to reduce the device current consumption. Because each peripheral unit has an individual clock-enable bit, reduction in current consumption can be achieved by turning off the clock to any peripheral module that is not used in a given application. Furthermore, any one of the three low-power modes could be taken advantage of to reduce the current consumption even further. Table 5-3 indicates the typical reduction in current consumption achieved by turning off the clocks.
Following are other methods to reduce power consumption further:
The baseline IDD current (current when the core is executing a dummy loop with no peripherals enabled) is 165 mA, (typical). To arrive at the IDD current for a given application, the current-drawn by the peripherals (enabled by that application) must be added to the baseline IDD current.