Refer to the PDF data sheet for device specific package drawings
The CPU enters this boot when it detects that TRST is HIGH (that is, when a JTAG debug probe/debugger is connected). In this mode, the user can program the EMU_BOOTCTRL control-word (at location 0xD00) to instruct the device on how to boot. If the contents of the EMU_BOOTCTRL location are invalid, then the device would default to WAIT Boot mode. The emulation boot allows users to verify the device boot before programming the boot mode into OTP. Note that EMU_BOOTCTRL is not actually a register, but refers to a location in RAM (PIE RAM). PIE RAM starts at 0xD00, but the first few locations are reserved (when initializing the PIE vector table in application code) for these boot ROM variables.