6.9 Interprocessor Communication Module
The IPC module supports several methods of interprocessor communication:
- Thirty-two IPC flags per CPU, which can be used to signal events or indicate status through software polling. Four flags per CPU can generate interrupts.
- Shared data registers, which can be used to send commands or other small pieces of information between CPUs. Although the register names were chosen to support a command/response system, they can be used for any purpose as defined in software.
- Boot mode and status registers, which allow CPU1 to control the CPU2 boot process.
- A general-purpose free-running 64-bit counter.
- Two shared message RAMs, which can be used to transfer bulk data. Each RAM can be read by both CPUs. CPU1 can write to one RAM and CPU2 can write to the other.
Figure 6-4 shows the IPC architecture.
Figure 6-4 IPC Architecture