SCDS390B September   2018  – March 2025 TMUX1511

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1.     Pin Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Dynamic Characteristics
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics
      1. 5.8.1 Eye Diagrams
  7. 6 Parameter Measurement Information
    1. 6.1  On-Resistance
    2. 6.2  Off-Leakage Current
    3. 6.3  On-Leakage Current
    4. 6.4  IPOFF Leakage Current
    5. 6.5  Transition Time
    6. 6.6  TON (VDD) and TOFF (VDD) Time
    7. 6.7  Propagation Delay
    8. 6.8  Skew
    9. 6.9  Charge Injection
    10. 6.10 Capacitance
    11. 6.11 Off Isolation
    12. 6.12 Channel-to-Channel Crosstalk
    13. 6.13 Bandwidth
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Operation
      2. 7.3.2 Beyond Supply Operation
      3. 7.3.3 1.8V Logic Compatible Inputs
      4. 7.3.4 Powered-off Protection
      5. 7.3.5 Fail-Safe Logic
      6. 7.3.6 Low Capacitance
      7. 7.3.7 Integrated Pull-Down Resistors
    4. 7.4 Device Functional Modes
    5. 7.5 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Protocol / Signal Isolation
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Transimpedance Amplifier Feedback Control
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

VDD = 1.5V to 5.5V, GND = 0V, TA = –40°C to +125°C,
Typical values are at VDD = 3.3V, TA = 25°C, (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER SUPPLY
VDDPower supply voltage1.55.5V
IDDSupply currentVSEL = 0V, 1.4V or VDD
VS = 0V to 5.5V		3770μA
DC CHARACTERISTICS
RONOn-resistanceVS = 0V to VDD*2
VS(max) = 5.5V
ISD = 8mA
Refer to ON-State Resistance Figure		24.5Ω
ΔRONOn-resistance match between channelsVS = VDD
ISD = 8mA
Refer to ON-State Resistance Figure		0.070.28Ω
RON (FLAT) On-resistance flatnessVS = 0V to VDD
ISD = 8mA
Refer to ON-State Resistance Figure		11.8Ω
IPOFFPowered-off I/O pin leakage currentVDD =  0 V
VS =  0V to 3V
VD = 0V
TA = 25℃
Refer to Ipoff Leakage Figure		–100.0110nA
IPOFFPowered-off I/O pin leakage currentVDD =  0V
VS =  0V to 3.6V
VD = 0V
Refer to Ipoff Leakage Figure		–20.012µA
IS(OFF)
ID(OFF)		OFF leakage currentSwitch Off
VD = 0.8*VDD / 0.2*VDD
VS = 0.2*VDD / 0.8*VDD
Refer to Off Leakage Figure		–1000.03100nA
ID(ON)
IS(ON)		ON leakage currentSwitch On
VD = 0.8*VDD / 0.2*VDD, S pins floating
or
VS = 0.8*VDD / 0.2*VDD, D pins floating
Refer to On Leakage Figure		–500.0150nA
LOGIC INPUTS
VIHInput logic high1.25.5V
VILInput logic low00.45V
IIHInput high leakage currentVSEL = 1.8V, VDD1±2μA
IILInput low leakage currentVSEL = 0V0.2±2μA
RPDInternal pull-down resistor on logic input pins6MΩ
CILogic input capacitanceVSEL = 0V, 1.8V or VDD
f = 1MHz		3pF