SCDS423 October   2020 TMUX1575

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Dynamic Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  IPOFF Leakage Current
    5. 7.5  Transition Time
    6. 7.6  tON (EN) and tOFF (EN) Time
    7. 7.7  Break-Before-Make Delay
    8. 7.8  Charge Injection
    9. 7.9  Off Isolation
    10. 7.10 Channel-to-Channel Crosstalk
    11. 7.11 Bandwidth
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Beyond Supply Operation
      3. 8.3.3 1.2 V Logic Compatible Inputs
      4. 8.3.4 Powered-off Protection
      5. 8.3.5 Fail-Safe Logic
      6. 8.3.6 Integrated Pull-Down Resistors
    4. 8.4 Device Functional Modes
      1. 8.4.1 Truth Tables
  9. Application and Implementation
    1. 9.1 Typical Application
      1. 9.1.1 Design Requirements
      2. 9.1.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device Functional Modes

The enable (EN) pin is an active-high logic pin that controls the connection between the source (SxA, SxB) and drain (Dx) pins of the device. When the enable pin is pulled low, all switches are turned off. When the enable is pulled high, the select pin controls the signal path selection. The select pin (SEL) controls the state of all four channels of the TMUX1575 and determines which source pin is connected to the drain pins. When the select pin is pulled low, the SxA pin conducts to the corresponding Dx pins. When the select pin is pulled high, the SxB pin conducts to the corresponding Dx pins. The TMUX1575 logic pins have internal weak pull-down resistors (6 MΩ) to GND so that it powers-on in a known state.

The TMUX1575 can be operated without any external components except for the supply decoupling capacitors. Unused logic control pins should be tied to GND or VDD in order to ensure the device does not consume additional current as highlighted in Implications of Slow or Floating CMOS Inputs. Unused signal path inputs (SxA, SxB, or Dx) should be connected to GND.