SCDS445B May 2022 – March 2023 TMUX4051 , TMUX4052 , TMUX4053
PRODUCTION DATA
Route high-speed signals using minimal vias and corners, which reduces signal reflections and impedance changes. When a via must be used, increase the clearance size around it to minimize its capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up interference from the other layers of the board. Be careful when designing test points, through-hole pins are not recommended at high frequencies.
GUID-5FAEAE45-39FD-4099-BE20-772DF666CBE6.html#SBOS705520 shows an example of a PCB layout with the TMUX4051, TMUX4052, and TMUX4053. Some key considerations are as follows: