SCDS431C October   2020  – August 2021 TMUX6211 , TMUX6212 , TMUX6213

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Thermal Information
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Source or Drain Continuous Current
    6. 7.6  ±15 V Dual Supply: Electrical Characteristics 
    7. 7.7  ±15 V Dual Supply: Switching Characteristics 
    8. 7.8  36 V Single Supply: Electrical Characteristics 
    9. 7.9  36 V Single Supply: Switching Characteristics 
    10. 7.10 12 V Single Supply: Electrical Characteristics 
    11. 7.11 12 V Single Supply: Switching Characteristics 
    12. 7.12 ±5 V Dual Supply: Electrical Characteristics 
    13. 7.13 ±5 V Dual Supply: Switching Characteristics 
    14. 7.14 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  tON and tOFF Time
    5. 8.5  tON (VDD) Time
    6. 8.6  Propagation Delay
    7. 8.7  Charge Injection
    8. 8.8  Off Isolation
    9. 8.9  Channel-to-Channel Crosstalk
    10. 8.10 Bandwidth
    11. 8.11 THD + Noise
    12. 8.12 Power Supply Rejection Ratio (PSRR)
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bidirectional Operation
      2. 9.3.2 Rail-to-Rail Operation
      3. 9.3.3 1.8 V Logic Compatible Inputs
      4. 9.3.4 Integrated Pull-Down Resistor on Logic Pins
      5. 9.3.5 Fail-Safe Logic
      6. 9.3.6 Latch-Up Immune
      7. 9.3.7 Ultra-Low Charge Injection
    4. 9.4 Device Functional Modes
    5. 9.5 Truth Tables
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-369C3F4C-3D4F-4E7B-88E5-0DFD745B9E3E-low.gifFigure 6-1 PW Package
16-Pin TSSOP
Top View
GUID-32576C13-DA31-4652-8155-538ECAA74330-low.gifFigure 6-2 RUM Package
16-Pin WQFN
Top View
Table 6-1 Pin Functions
PIN TYPE(1) DESCRIPTION(2)
NAME TSSOP WQFN
D1 2 16 I/O Drain pin 1. Can be an input or output.
D2 15 13 I/O Drain pin 2. Can be an input or output.
D3 10 8 I/O Drain pin 3. Can be an input or output.
D4 7 5 I/O Drain pin 4. Can be an input or output.
GND 5 3 P Ground (0 V) reference
N.C. 12 10 — No internal connection. Can be shorted to GND or left floating.
S1 3 1 I/O Source pin 1. Can be an input or output.
S2 14 12 I/O Source pin 2. Can be an input or output.
S3 11 9 I/O Source pin 3. Can be an input or output.
S4 6 4 I/O Source pin 4. Can be an input or output.
S3 11 9 I/O Source pin 3. Can be an input or output.
SEL1 1 15 I Logic control input 1, has internal 4 MΩ pull-down resistor. Controls channel 1 state as shown in Section 9.5.
SEL2 16 14 I Logic control input 2, has internal 4 MΩ pull-down resistor. Controls channel 2 state as shown in Section 9.5.
SEL3 9 7 I Logic control input 3, has internal 4 MΩ pull-down resistor. Controls channel 3 state as shown in Section 9.5.
SEL4 8 6 I Logic control input 4, has internal 4 MΩ pull-down resistor. Controls channel 4 state as shown in Section 9.5.
VDD 13 11 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND.
VSS 4 2 P Negative power supply. This pin is the most negative power-supply potential. In single-supply applications, this pin can be connected to ground. For reliable operation, connect a decoupling capacitor ranging from 0.1 μF to 10 μF between VSS and GND.
Thermal Pad — The thermal pad is not connected internally. No requirement to solder this pad, if connected it is recommended that the pad be left floating or tied to GND
(1) I = input, O = output, I/O = input and output, P = power.
(2) Refer to Section 9.4 for what to do with unused pins.