SLVSF72C December   2019  – February 2021 TPD4S311 , TPD4S311A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings—JEDEC Specification
    3. 7.3 ESD Ratings—IEC Specification
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 4-Channels of Short-to-VBUS Overvoltage Protection (CC1, CC2, SBU1, SBU2 Pins ): 24-VDC Tolerant
      2. 8.3.2 4-Channels of IEC 61000-4-2 ESD Protection (CC1, CC2, SBU1, SBU2 Pins)
      3. 8.3.3 CC1, CC2 Overvoltage Protection FETs 400-mA or 600-mA Capable for Passing VCONN Power
      4. 8.3.4 CC Dead Battery Resistors Integrated for Handling the Dead Battery Use Case in Mobile Devices
      5. 8.3.5 1.69-mm × 1.69-mm DSBGA Package
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 VBIAS Capacitor Selection
        2. 9.2.2.2 Dead Battery Operation
        3. 9.2.2.3 CC Line Capacitance
        4. 9.2.2.4 Additional ESD Protection on CC and SBU Lines
        5. 9.2.2.5 FLT Pin Operation
        6. 9.2.2.6 How to Connect Unused Pins
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4 Device Functional Modes

Table 8-1 describes all of the functional modes for the TPD4S311. The "X" in the below table are "do not care" conditions, meaning any value can be present within the absolute maximum ratings of the datasheet and maintain that functional mode.

Table 8-1 Device Mode Table
Device Mode TableInputsOutputs
MODEVPWRC_CCxC_SBUxRPD_GxTJFLTCC FETsSBU FETs
Normal Operating ConditionsUnpowered, no dead battery support<UVLOXXGroundedXHigh-ZOFFOFF
Unpowered, dead battery support<UVLOXXShorted to C_CCxXHigh-ZOFFOFF
Powered on>UVLO<OVP<OVPX, forced OFF<TSDHigh-ZONON
Fault ConditionsThermal shutdown>UVLOXXX, forced OFF>TSDLow (Fault Asserted)OFFOFF
CC over voltage condition>UVLO>OVPXX, forced OFF<TSDLow (Fault Asserted)OFFOFF
SBU over voltage condition>UVLOX>OVPX, forced OFF<TSDLow (Fault Asserted)OFFOFF
IEC ESD generated over voltage condition(1)>UVLOXXRD ON if RPD_Gx is shorted to C_CCx<TSDLow (Fault Asserted)OFFOFF
(1) This row describes the state of the device while still in OVP after the IEC ESD strike which put the device into OVP is over, and the voltages on the C_CCx and C_SBUx pins have returned to their normal voltage levels.