SLIS032B July   1995  – June 2015 TPIC6B595

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Serial-In Interface
      2. 8.3.2 Clear Register
      3. 8.3.3 Output Control
      4. 8.3.4 Cascaded Application
      5. 8.3.5 Current Limit Function
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With V(VCC) < 4.5 (Minimum V(VCC))
      2. 8.4.2 Operating With 5.5 V < V(VCC) < 6 V
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VCC Logic supply voltage(2) –0.3 7 V
VI Logic input voltage –0.3 7 V
VDS Power DMOS drain-to-source voltage(3) –0.3 50 V
Continuous source-to-drain diode anode current 0 500 mA
Pulsed source-to-drain diode anode current(4) 0 1 A
ID Pulsed drain current, each output, all outputs ON, TC = 25°C(4) 0 500 mA
ID Continuous drain current, each output, all outputs ON, TC = 25°C(4) 0 150 mA
IDM Peak drain current single output, TC = 25°C(4) 0 500 mA
EAS Single-pulse avalanche energy (see Figure 11) 0 30 mJ
IAS Avalanche current(5) 0 500 mA
Continuous total dissipation See Thermal Information
TJ Operating virtual junction temperature –40 150 °C
TC Operating case temperature –40 125 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND.
(3) Each power DMOS source is internally connected to GND.
(4) Pulse duration ≤ 100 μs and duty cycle ≤ 2%.
(5) DRAIN supply voltage = 15 V, starting junction temperature (TJS) = 25°C, L = 1.5 H, IAS = 200 mA (see Figure 11).

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 All pins ±500
Corner pins (1, 10, 20, 11) ±750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCC Logic supply voltage 4.5 5.5 V
VIH High-level input voltage 0.85 VCC V
VIL Low-level input voltage 0.15 VCC V
Pulsed drain output current, TC = 25°C, VCC = 5 V, all outputs on(1)(2) (see Figure 7) –500 500 mA
tsu Setup time, SER IN high before SRCK↑ (see Figure 9) 20 ns
th Hold time, SER IN high after SRCK↑, (see Figure 9) 20 ns
tw Pulse duration (see Figure 9) 40 ns
TC Operating case temperature –40 125 °C
(1) Pulse duration ≤ 100 μs and duty cycle ≤ 2%.
(2) Technique should limit TJ − TC to 10°C maximum.

6.4 Thermal Information

THERMAL METRIC(1) TPIC6B595 UNIT
DW (SOIC) N (PDIP)
20 PINS 20 PINS
RθJA Junction-to-ambient thermal resistance 75.3 57 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 39.8 58.5 °C/W
RθJB Junction-to-board thermal resistance 43.1 38 °C/W
ψJT Junction-to-top characterization parameter 15.4 25.2 °C/W
ψJB Junction-to-board characterization parameter 42.6 37.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V(BR)DSX Drain-to-source breakdown voltage ID = 1 mA 50 V
VSD Source-to-drain diode forward voltage IF = 100 mA 0.85 1 V
VOH High-level output voltage, SER OUT IOH = −20 µA, VCC = 4.5 V 4.4 4.49 V
IOH = −4 mA, VCC = 4.5 V 4 4.2
VOL Low-level output voltage, SER OUT IOL = 20 µA, VCC = 4.5 V 0.005 0.1 V
IOL = 4 mA, VCC = 4.5 V 0.3 0.5
IIH High-level input current VCC = 5.5 V, VI = VCC 1 µA
IIL Low-level input current VCC = 5.5 V, VI = 0 –1 µA
ICC Logic supply current VCC = 5.5 V All outputs OFF 20 100 µA
All outputs ON 150 300
ICC(FRQ) Logic supply current at frequency fSRCK = 5 MHz,
All outputs off,		 CL = 30 pF,
See Figure 9 and Figure 2		 0.4 5 mA
IN Nominal current VDS(on) = 0.5 V,
IN = ID,
TC = 85°C 		See (1)(2)(3) 90 mA
IDSX OFF-state drain current VDS = 40 V, VCC = 5.5 V 0.1 5 µA
VDS = 40 V
TC = 125°C		 VCC = 5.5 V
 0.15 8
rDS(on) Static drain-source ON-state resistance ID = 100 mA,
VCC = 4.5 V		 See (1) and(2) and Figure 3 and Figure 4 4.2 5.7 Ω
ID = 100 mA,
TC = 125°C,
VCC = 4.5 V		 6.8 9.5
ID = 350 mA,
VCC = 4.5 V		 5.5 8
(1) Technique should limit TJ − TC to 10°C maximum.
(2) These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
(3) Nominal current is defined for a consistent comparison between devices from different sources. It is the current that produces a voltage drop of 0.5 V at TC = 85°C.

6.6 Switching Characteristics

VCC = 5 V, TC = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output from G CL = 30 pF, ID = 100 mA, See Figure 5, Figure 8 and Figure 9 150 ns
tPHL Propagation delay time, high-to-low-level output from G 90 ns
tr Rise time, drain output 200 ns
tf Fall time, drain output 200 ns
ta Reverse-recovery-current rise time IF = 100 mA, di/dt = 10 A/µs(1)(2),
See Figure 10		 100 ns
trr Reverse-recovery time 300
(1) Technique should limit TJ − TC to 10°C maximum.
(2) These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.

6.7 Typical Characteristics

TPIC6B595 garph_1_slis032.gif
Figure 1. Peak Avalanche Current vs Time Duration of Avalanche
TPIC6B595 garph_3_slis032.gif
Technique should limit TJ − TC to 10°C maximum.
Figure 3. Drain-to-Source On-State Resistance
vs Drain Current
TPIC6B595 garph_5_slis032.gif
Technique should limit TJ − TC to 10°C maximum
Figure 5. Switching Time vs Case Temperature
TPIC6B595 garph_7_slis032.gif
Figure 7. Maximum Peak Drain Current of
Each Output vs Number of Outputs Conducting Simultaneously
TPIC6B595 garph_2_slis032.gif
Figure 2. Supply Current vs Frequency
TPIC6B595 garph_4_slis032.gif
Technique should limit TJ − TC to 10°C maximum.
Figure 4. Static Drain-to-Source On-State Resistance
vs Logic Supply Voltage
TPIC6B595 garph_6_slis032.gif
Figure 6. Maximum Continuous Drain Current of
Each Output vs Number of Outputs Conducting Simultaneously