SLVSHO1 March   2025 TPS1689

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  PMBus and GPIO DC Characteristics
    7. 5.7  Telemetry
    8. 5.8  Logic Interface
    9. 5.9  Timing Requirements
    10. 5.10 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Undervoltage Protection
      2. 6.3.2  Insertion Delay
      3. 6.3.3  Overvoltage Protection
      4. 6.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 6.3.4.1 Slew rate (dVdt) and Inrush Current Control
          1. 6.3.4.1.1 Start-Up Timeout
        2. 6.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 6.3.4.3 Active Current Limiting During Start-Up
        4. 6.3.4.4 Short-Circuit Protection
      5. 6.3.5  Analog Load Current Monitor (IMON)
      6. 6.3.6  Overtemperature Protection
      7. 6.3.7  Analog Junction Temperature Monitor (TEMP)
      8. 6.3.8  FET Health Monitoring
      9. 6.3.9  Single Point Failure Mitigation
        1. 6.3.9.1 IMON Pin Single Point Failure
        2. 6.3.9.2 IREF Pin Single Point Failure
      10. 6.3.10 General Purpose Digital Input/Output Pins
        1. 6.3.10.1 Fault Response and Indication (FLT)
        2. 6.3.10.2 Power Good Indication (PG)
        3. 6.3.10.3 Parallel Device Synchronization (SWEN)
      11. 6.3.11 Stacking Multiple eFuses for Unlimited Scalability
        1. 6.3.11.1 Current Balancing During Start-Up
      12. 6.3.12 Quick Output Discharge(QOD)
      13. 6.3.13 Write Protect Feature(WP#)
      14. 6.3.14 PMBus® Digital Interface
        1. 6.3.14.1  PMBus® Device Addressing
        2. 6.3.14.2  SMBus Protocol
        3. 6.3.14.3  SMBus™ Message Formats
        4. 6.3.14.4  Packet Error Checking
        5. 6.3.14.5  Group Commands
        6. 6.3.14.6  SMBus™ Alert Response Address (ARA)
        7. 6.3.14.7  PMBus® Commands
        8. 6.3.14.8  Analog-to-digital Converter
        9. 6.3.14.9  Digital-to-analog Converters
        10. 6.3.14.10 DIRECT format Conversion
        11. 6.3.14.11 Blackbox Fault Recording
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Single Device, Standalone Operation
      2. 7.1.2 Single TPS1689 and multiple TPS1685 Devices, Parallel Connection
      3. 7.1.3 Multiple TPS1689 Devices: Parallel Connection With Individual Telemetry
      4. 7.1.4 Multiple Devices, Independent Operation (Multi-zone)
    2. 7.2 Typical Application: 54-V, 2-kW Power Path Protection with PMBus® Interface in Datacenter Servers
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Performance Plots
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Transient Protection
      2. 7.3.2 Output Short-Circuit Measurements
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Application Limitation and Errata
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.9 Timing Requirements

–40°C ≤ TJ ≤ +125°C, VIN = VDD = 45 V to 60 V, OUT = Open, RILIM = 931 Ω RIMON = 2.55 kΩ, VIREF = 1 V , FLT = 33 kΩ pull-up to 3.3 V, PGOOD = 33 kΩ pull-up to 3.3 V, COUT = 10 µF, CIN = 10 nF, dVdT = Open , VEN/UVLO = 2 V, TEMP/EECLK/GPIO1 = Open, AUX/EEDATA/GPIO2 = Open, ADDR0 = Open, ADDR1 = Open, SCL = 330Ω pull-up to 3.3 V, SDA = 330Ω pull-up to 3.3 V.  (All voltages referenced to GND, (unless otherwise noted))
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tOVP Overvoltage protection response time VOVP > VOVPR V to SWEN↓  1.5
µs
tInsdly Insertion delay INS_DLY = 0x00,  VEN/UVLO > VUVLO(R) to SWEN↑ 10 ms
INS_DLY = 0x07,  VEN/UVLO > VUVLO(R) to SWEN↑ 560 ms
tFFT Fixed Fast-Trip response time Hard Short VDS > 1.5 x VDSCOMP to IOUT↓ 200 ns
tSFT Scalable Fast-Trip response time IOUT > 3 x ITRIP to IOUT↓ 400 ns
tITIMER Overcurrent blanking interval  IOUT = 1.5 x ITRIP, OC_TIMER = 0x00 0 ms
tITIMER Overcurrent blanking interval  IOUT = 1.5 x ITRIP, OC_TIMER = 0x14
(Default)		 2.1 ms
tITIMER Overcurrent blanking interval  IOUT = 1.5 x ITRIP, OC_TIMER = 0xFF 27.3 ms
tRST Auto-Retry Interval RETRY_CONFIG[2:0] = 100 800 ms
tEN(DG) EN/UVLO de-glitch time 10
µs
tSU_TMR Start-up timeout interval SWEN↑ to FLT↓   8 s
tDischarge QOD discharge time (90% to 10% of VOUT) VSD < VEN/UVLO < VUVLO, COUT = 0.5 mF, VIN = 51 V.  1300 ms
tQOD QOD enable timer VSD < VEN/UVLO < VUVLO 5.9 ms
tPGA PG assertion delay DEVICE_CONFIG[15] = 0, Device in
steady state, VOUT > VOUT_PGTH to
PG↑		 100 µs
tPGD PG De-assertion delay Device in steady state, VOUT <
VOUT_PGTH to PG↓		 3 µs