SLVSEE0D February   2018  – September 2021 TPS1H200A-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current limit
      2. 7.3.2 DELAY Pin Configuration
        1. 7.3.2.1 Holding Mode
        2. 7.3.2.2 Latch-Off Mode
        3. 7.3.2.3 Auto-Retry Mode
      3. 7.3.3 Stand-alone Operation
      4. 7.3.4 Fault Truth Table
      5. 7.3.5 Full Diagnostics
        1. 7.3.5.1 Short-to-GND and Overload Detection
        2. 7.3.5.2 Open-Load Detection
          1. 7.3.5.2.1 Output On
          2. 7.3.5.2.2 Output Off
        3. 7.3.5.3 Short-to-Battery Detection
        4. 7.3.5.4 Thermal Fault Detection
          1. 7.3.5.4.1 Thermal Shutdown
          2. 7.3.5.4.2 Thermal Swing
          3. 7.3.5.4.3 Fault Report Holding
      6. 7.3.6 Full Protections
        1. 7.3.6.1 UVLO Protection
        2. 7.3.6.2 Inductive Load Switching Off Clamp
        3. 7.3.6.3 Loss-of-GND Protection
        4. 7.3.6.4 Loss-of-Power-Supply Protection
        5. 7.3.6.5 Reverse-Current Protection
        6. 7.3.6.6 MCU I/O Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Working Modes
        1. 7.4.1.1 Normal Mode
        2. 7.4.1.2 Standby Mode
        3. 7.4.1.3 Standby Mode With Diagnostics
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

over operating ambient temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
OPERATING VOLTAGE
VVS(nom)Nominal operating voltage440V
VVS(uvr)Undervoltage restartVVS rising3.53.74V
VVS(uvf)Undervoltage shutdownVVS falling33.23.4V
V(uv,hys)Undervoltage shutdown, hysteresis0.5V
OPERATING CURRENT
I(op)Nominal operating currentVVS = 13.5 V, VIN = 5 V
VDIAG_EN = X V, IOUT = 0.5 A
ICL = 2 A
5mA
I(off)Standby currentVVS = 13.5 V
VIN = VDIAG_EN = VCL = VOUT = 0 V
TJ = 25°C
0.5µA
VVS = 13.5 V
VIN = VDIAG_EN = VCL = VOUT = 0 V
TJ = 125°C
3
I(off,diag)Standby current with diagnostics enabledVVS = 13.5 V
VIN = 0 V, VDIAG_EN = 5 V
3mA
t(off,deg)Standby-mode deglitch time(1)IN from high to low
if deglitch time ≥ t(off,deg), then
the device enters into standby mode.
12.5ms
Ilkg(out)Output leakage current in OFF stateVVS = 13.5 V
VIN = VDIAG_EN = VOUT = 0 V
3µA
POWER STAGE
rDS(on)ON state resistanceVVS ≥ 3.5 V, TJ = 25°C200
VVS ≥ 3.5 V, TJ = 150°C400
ICL(int)Internal current limitCL pin connected to GND3.54.86A
ICL(TSD)Current-limit value percentage
during thermal shutdown
60%
VDS(clamp)Drain−to−source voltage
internally clamped
4565V
OUTPUT DIODE CHARACTERISTICS
VFDrain−to-source diode voltageIN = 0, IOUT = −0.15 A0.30.71V
IR(1)Continuous reverse current from
source to drain during a
short-to-battery condition(1)
t < 60 s, VIN= 0 V, TJ = 25°C.2A
IR(2)Continuous reverse current from
source to drain during a
reverse-polarity condition(1)
t < 60 s, VIN= 0 V, TJ = 25°C
GND pin 1-kΩ resistor in
parallel with diode.
2A
LOGIC INPUT (IN, DIAG_EN)
VIHLogic high-level voltage1.8V
VILLogic low-level voltage0.8V
Rpd,inLogic-pin pulldown resistorIN. VIN = 5 V150400
DIAG_EN. VVS = VDIAG_EN = 5 V350850
DIAGNOSTICS
Ilkg(loss,GND)Loss of ground output leakage current100µA
td(ol,on)Open-load deglitch time in ON stateVIN = 5 V, VDIAG_EN = 5 V
when IOUT < I(ol,on), duration longer than td(ol,on), open load is detected.
200300450µs
I(ol,on)Open-load detection threshold
in ON state
VIN = 5 V, VDIAG_EN = 5 V
when IOUT < I(ol,on)
duration longer than td(ol,on)
open load is detected.
1020mA
V(ol,off)Open-load detection threshold in OFF stateVIN = 0 V, VDIAG_EN = 5 V
when VVS – VOUT < V(ol,off)
duration longer than td(ol,off)
open load is detected.
1.42.6V
td(ol,off)Open-load deglitch time
in OFF state
VIN = 0 V, VDIAG_EN = 5 V
when VVS – VOUT < V(ol,off)
duration longer than td(ol,off)
open load is detected.
200300450µs
I(ol,off)OFF state output sink currentVIN = 0 V, VDIAG_EN = 5 V
VVS = VOUT = 13.5 V
–75µA
VFAULTFAULT low output voltageIFAULT = 2 mA0.2V
tFAULTFAULT signal holding time(1)8.5ms
T(SD)Thermal shutdown threshold(1)175°C
T(SD,rst)Thermal shutdown status reset(1)155°C
T(sw)Thermal swing shutdown threshold(1)60°C
T(hys)Hysterisis for resetting the thermal shutdown and swing(1)10°C
CURRENT LIMIT AND DELAY CONFIGURATION
K(CL)Current-limit current ratio(1)2500
VCL(th)Current-limit internal threshold voltage(1)0.8V
dK(CL) / K(CL)External current limit accuracy
(IOUT – ICL × K(CL) × 100 /
(ICL × K(CL))
Ilimit ≥ 0.25 A, VVS – VOUT ≥ 2.5 V–20%20%
Ilimit ≥ 0.5 A, VVS – VOUT ≥ 2.5 V–15%15%
Ilimit ≥ 1.5 A, Ilimit < 5 A
VVS – VOUT ≥ 2.5 V
–10%10%
Idl(chg)Delay pin charging current
in latch-off mode(1)
4.5µA
Vdl(th)Pulling up threshold in auto-retry mode2.7V
Vdl(ref)Internal reference voltage
in latch-off mode
1.45V
tdl1Internal fixed delay time(1)300400500µs
tdl2Adjustable delay time by external capacitor on DELAY pin(1)Connect with 3.3 µF capacitor
as the maximum value.
1000ms
tCL(deg)Deglitch time when current limit (1)IN low to high or IN keeps high but thermal shutdown recovery, VDIAG_EN = 5 V
the deglitch time from IN rising
edge to FAULT reporting out.
300550µs
IN keeps high, VDIAG_EN = 5 V
the deglitch time from CL start-point to FAULT reporting out.
80200
thic(on)On-time when in auto-retry mode(1)354045ms
thic(off)Off-time when in auto-retry mode(1)0.811.2s
Value specified by design, not subject to production test.