IEEE802.3bt includes new PSE output limiting requirements for Type 3 and 4 operation to cover higher power and 4-pair applications. Type 2, 3 and 4 PSEs must meet an output current vs time template with specified minimum and maximum sourcing boundaries. The peak output current per each 2-pair may be as high as 50 A for 10 μs or 1.75 A for 75 ms, and the total peak current becomes twice these values when power is delivered over 4 pairs. This makes robust protection of the PD device even more important than it was in IEEE 802.3-2012.

The PD section has the following self-protection functions.

• Hotswap switch current limit
• Hotswap switch foldback
• Hotswap thermal protection

The internal hotswap MOSFET of the TPS23734 is protected against output faults and input voltage steps with a current limit and deglitched foldback. High stress conditions include converter output shorts, shorts from VDD to RTN, or transients on the input line. An overload on the pass MOSFET engages the current limit, with V_RTN-VSS rising as a result. If V_RTN rises above approximately 14.8 V for longer than approximately 1.8 ms, the current limit reverts to the inrush limit, and turns the converter off, although there is no minimum inrush delay period (84 ms) applicable in this case. The 1.8-ms deglitch feature prevents momentary transients from causing a PD reset, provided that recovery lies within the bounds of the hotswap and PSE protection. Figure 8-14 shows an example of recovery from a 15-V PSE rising voltage step. The hotswap MOSFET goes into current limit, overshooting to a relatively low current, recovers to 925-mA full current limit, and charges the input capacitor while the converter continues to run. The MOSFET did not go into foldback because V_RTN-VSS was below 14.8 V after the 1.8-ms deglitch.

Figure 8-14 Response to PSE Step Voltage

The PD control has a thermal sensor that protects the internal hotswap MOSFET. Conditions like start-up or operation into a VDD to RTN short cause high power dissipation in the MOSFET. An overtemperature shutdown (OTSD) turns off the hotswap MOSFET and class regulator, which are restarted after the device cools. The PD restarts in inrush phase when exiting from a PD overtemperature event.

Pulling DEN to VSS during powered operation causes the internal hotswap MOSFET to turn off. This feature allows a PD with secondary-side adapter ORing to achieve adapter priority. Take care with synchronous converter topologies that can deliver power in both directions.

The hotswap switch is forced off under the following conditions:

• V_APD above V_APDEN (approximately 1.5 V)
• V_DEN ≤ V_{PD_DIS} when V_VDD-VSS is in the operational range
• PD over temperature
• V_VDD-VSS < PoE UVLO (approximately 32 V).