SLVSER8A June   2020  – September 2020 TPS23734

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: DC-DC Controller Section
    6. 7.6 Electrical Characteristics PoE
    7.     15
    8. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  CLS Classification
      2. 8.3.2  DEN Detection and Enable
      3. 8.3.3  APD Auxiliary Power Detect
      4. 8.3.4  Internal Pass MOSFET
      5. 8.3.5  T2P and APDO Indicators
      6. 8.3.6  DC-DC Controller Features
        1. 8.3.6.1 VCC, VB, VBG and Advanced PWM Startup
        2.       28
        3. 8.3.6.2 CS, Current Slope Compensation and blanking
        4. 8.3.6.3 COMP, FB, EA_DIS, CP, PSRS and Opto-less Feedback
        5. 8.3.6.4 FRS Frequency Setting and Synchronization
        6. 8.3.6.5 DTHR and Frequency Dithering for Spread Spectrum Applications
        7. 8.3.6.6 SST and Soft-Start of the Switcher
        8. 8.3.6.7 SST, I_STP, LINEUV and Soft-Stop of the Switcher
      7. 8.3.7  Switching FET Driver - GATE, GTA2, DT
      8. 8.3.8  EMPS and Automatic MPS
      9. 8.3.9  VDD Supply Voltage
      10. 8.3.10 RTN, AGND, GND
      11. 8.3.11 VSS
      12. 8.3.12 Exposed Thermal pads - PAD_G and PAD_S
    4. 8.4 Device Functional Modes
      1. 8.4.1  PoE Overview
      2. 8.4.2  Threshold Voltages
      3. 8.4.3  PoE Start-Up Sequence
      4. 8.4.4  Detection
      5. 8.4.5  Hardware Classification
      6. 8.4.6  Maintain Power Signature (MPS)
      7. 8.4.7  Advanced Start-Up and Converter Operation
      8. 8.4.8  Line Undervoltage Protection and Converter Operation
      9. 8.4.9  PD Self-Protection
      10. 8.4.10 Thermal Shutdown - DC-DC Controller
      11. 8.4.11 Adapter ORing
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Detailed Design Procedure
          1. 9.2.1.1.1  Input Bridges and Schottky Diodes
          2. 9.2.1.1.2  Input TVS Protection
          3. 9.2.1.1.3  Input Bypass Capacitor
          4. 9.2.1.1.4  Detection Resistor, RDEN
          5. 9.2.1.1.5  Classification Resistor, RCLS.
          6. 9.2.1.1.6  Dead Time Resistor, RDT
          7. 9.2.1.1.7  APD Pin Divider Network, RAPD1, RAPD2
          8. 9.2.1.1.8  Setting Frequency (RFRS) and Synchronization
          9. 9.2.1.1.9  Bias Supply Requirements and CVCC
          10. 9.2.1.1.10 APDO, T2P Interface
          11. 9.2.1.1.11 Secondary Soft Start
          12. 9.2.1.1.12 Frequency Dithering for Conducted Emissions Control
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 EMI Containment
    4. 11.4 Thermal Considerations and OTSD
    5. 11.5 ESD
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.6.3 COMP, FB, EA_DIS, CP, PSRS and Opto-less Feedback

The TPS23734 DC-DC controller implements current-mode control as shown in Functional Block Diagram, using internal (via pins FB input and COMP output, with EA_DIS pulled low) or external (via COMP input, with EA_DIS open) voltage control loop error amplifier to define the input reference voltage of the current mode control comparator which determines the switching MOSFET peak current.

VCOMP below VZDC causes the converter to stop switching. The maximum (peak) current is requested at approximately (VZDC + 5 × (VCSMAX + VSLOPE)). The AC gain from COMP to the PWM comparator is typically 0.2.

In flyback applications and with the internal error amplifier enabled, the TPS23734 DC-DC controller can operate with feedback from an auxiliary winding of the flyback power transformer to achieve primary side regulation (PSR), eliminating the need for external shunt regulator and optocoupler. One noteworthy characteristic of this PSR is that it operates with continuous (DC) feedback, enabling better optimization of the power supply, and resulting in significantly lower noise sensitivity.

When combined with secondary-side synchronous rectification (with PSRS open), the opto-less operation of the TPS23734 is achieved with a unique approach which basically consists in actively cancelling (through the use of CP output) the leading-edge voltage overshoot (causing the feedback capacitor to peak-charge) generated by the transformer winding. When combined with a correctly designed power transformer, less than ±1.5% load regulation (typical) over the full output current range becomes achievable in applications making use of secondary-side synchronous rectifiers. Operation is in continuous conduction mode (CCM), also enabling multi-output architectures.

Opto-less operation of the TPS23734 also applies (with PSRS pulled low) to single-output flyback converter applications where a secondary-side diode rectifier is used. In typical 12 V output application and when combined with a correctly designed power transformer, ~±3% load regulation over a wide (< 5% to 100%) output current range can be achieved.

In applications where the internal error amplifier is disabled, the COMP pin receives the control voltage typically from a TL431 or TLV431 shunt regulator driving an optocoupler, using VB pin as a pull up source, although other configurations are possible.