SLVSDW2B December   2018  – November 2020 TPS23755

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: DC-DC Controller Section
    6. 6.6 Electrical Characteristics: PoE and Control
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  CLS Classification
      2. 7.3.2  DEN Detection and Enable
      3. 7.3.3  Internal Pass MOSFET
      4. 7.3.4  DC-DC Controller Features
        1. 7.3.4.1 VCC, VB and Advanced PWM Startup
        2. 7.3.4.2 CS, Current Slope Compensation and Blanking
        3. 7.3.4.3 COMP, FB, CP and Opto-less Feedback
        4. 7.3.4.4 FRS Frequency Setting and Synchronization
        5. 7.3.4.5 Frequency Dithering for Spread Spectrum Applications
        6. 7.3.4.6 SST and Soft-Start of the Switcher
        7. 7.3.4.7 AUX_V, AUX_D and Secondary Adapter Or'ing
      5. 7.3.5  Internal Switching FET - DRAIN, RSNS, SRF and SRR
      6. 7.3.6  VPD Supply Voltage
      7. 7.3.7  VDD Supply Voltage
      8. 7.3.8  GND
      9. 7.3.9  VSS
      10. 7.3.10 Exposed Thermal PAD
    4. 7.4 Device Functional Modes
      1. 7.4.1 PoE Overview
      2. 7.4.2 Threshold Voltages
      3. 7.4.3 PoE Start-Up Sequence
      4. 7.4.4 Detection
      5. 7.4.5 Hardware Classification
      6. 7.4.6 Maintain Power Signature (MPS)
      7. 7.4.7 Start-Up and Converter Operation
      8. 7.4.8 PD Self-Protection
      9. 7.4.9 Adapter ORing
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Input Bridges and Schottky Diodes
        2. 8.2.2.2  Protection, D1
        3. 8.2.2.3  Capacitor, C1
        4. 8.2.2.4  Detection Resistor, RDEN
        5. 8.2.2.5  Classification Resistor, RCLS
        6. 8.2.2.6  Bulk Capacitance, CBULK
        7. 8.2.2.7  Output Voltage Feedback Divider, RAUX, R1,R2
        8. 8.2.2.8  Setting Frequency, RFRS
        9. 8.2.2.9  Frequency Dithering, RDTR and CDTR
        10. 8.2.2.10 Bias Voltage, CVB and DVB
        11. 8.2.2.11 Transformer design, T1
        12. 8.2.2.12 Current Sense Resistor, RCS
        13. 8.2.2.13 Current Slope Compensation, RS
        14. 8.2.2.14 Bias Supply Requirements, CCC, DCC
        15. 8.2.2.15 Switching Transformer Considerations, RVCC and CCC2
        16. 8.2.2.16 Primary FET Clamping, RCL, CCL, and DCL
        17. 8.2.2.17 Converter Output Capacitance, COUT
        18. 8.2.2.18 Secondary Output Diode Rectifier, DOUT
        19. 8.2.2.19 Slew rate control, RSRF and RSRR
        20. 8.2.2.20 Shutdown at Low Temperatures, DVDD and CVDD
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related documentation
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • RJJ|23
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Adapter ORing

Many PoE-capable devices are designed to operate from either a wall adapter or PoE power. A local power solution adds cost and complexity, but allows a product to be used if PoE is not available in a particular installation. While most applications only require that the PD operate when both sources are present, the TPS23755 device supports forced operation from either of the power sources. Figure 7-11 illustrates three options for diode ORing external power into a PD. Only one option would be used in any particular design. Option 1 applies power to the device input, option 2 applies power between the device PoE section and the power circuit, and option 3 applies power to the output side of the converter. Each of these options has advantages and disadvantages. Many of the basic ORing configurations and much of the discussion contained in the application note Advanced Adapter ORing Solutions using the TPS23753, (SLVA306), apply to the TPS23755.

GUID-2A233736-91E5-4243-90F8-ABB9D82C0828-low.gif Figure 7-11 ORing Configurations

Preference of one power source presents a number of challenges. Combinations of adapter output voltage (nominal and tolerance), power insertion point, and which source is preferred determine solution complexity. Several factors contributing to the complexity are the natural high-voltage selection of diode ORing (the simplest method of combining sources), the current limit implicit in the PSE, PD inrush, and protection circuits (necessary for operation and reliability). Creating simple and seamless solutions is difficult if not impossible for many of the combinations. However, the TPS23755 device offers several built-in features that simplify some combinations.

Several examples demonstrate the limitations inherent in ORing solutions. Diode ORing a 48-V adapter with PoE (option 1) presents the problem that either source might be higher. A blocking switch would be required to assure which source was active. A second example is combining a 12-V adapter with PoE using option 2. The converter draws approximately four times the current at 12 V from the adapter than it does from PoE at 48 V. Transition from adapter power to PoE may demand more current than can be supplied by the PSE. The converter must be turned off while CBULK capacitance charges, with a subsequent converter restart at the higher voltage and lower input current. A third example is use of a 12-V adapter with ORing option 1. The PD hotswap would have to handle four times the current, and have 1/16 the resistance (be 16 times larger) to dissipate equal power. A fourth example is that MPS is lost when running from the adapter, causing the PSE to remove power from the PD. If adapter power is then lost, the PD stops operating until the PSE detects and powers the PD.

The TPS23755 has a unique feature that can be used to achieve seamless transition while applying option 3. It provides adapter priority by reducing the DC-DC output voltage when the adapter voltage is present. An optocoupler is typically driven from the secondary side of the converter when the adapter voltage is present, which commands the converter voltage to go down to a predetermined voltage level, by use of pins AUX_D and AUX_V. This voltage level is lower than the minimum adapter voltage to ensure priority. The DC-DC converter stays in operation, which with appropriate minimum loading can ensure the PSE power will be maintained, to ensure there will be no output power interruption next time the adapter voltage goes down.

The IEEE standards require that the PI conductors be electrically isolated from ground and all other system potentials not part of the PI interface. The adapter must meet a minimum 1500-Vac dielectric withstand test between the output and all other connections for options 1 and 2. The adapter only needs this isolation for option 3 if it is not provided by the converter.

Adapter ORing diodes are shown for all the options to protect against a reverse-voltage adapter, a short on the adapter input pins, and damage to a low-voltage adapter. ORing is sometimes accomplished with a MOSFET in option 3.