SLUSBX9J
March 2014 – October 2026
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
5.7
Switching Characteristics
5.8
Typical Characteristics
6
Detailed Description
6.1
Overview
6.1.1
Detailed Pin Description
6.1.2
I2C Detailed Pin Description
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Detection Resistance Measurement
6.3.2
Physical Layer Classification
6.3.3
Class and Detect Fields
6.3.4
Register State Following a Fault
6.3.5
Disconnect
6.3.6
Disconnect Threshold
6.3.7
Fast Shutdown Mode
6.3.8
Legacy Device Detection
6.3.9
VPWR Undervoltage and UVLO Events
6.3.10
Timer-Deferrable Interrupt Support
6.3.11
A/D Converter and I2C Interface
6.3.12
Independent Operation when the AUTO Bit is Set
6.3.13
I2C Slave Address and AUTO Bit Programming
6.4
Device Functional Modes
6.4.1
Off
6.4.2
Manual
6.4.3
Semi-Auto
6.4.4
Auto
6.4.5
Push-Button Power On Response
6.4.6
TSTART Indicators of Detect and Class Failures
6.4.7
Device Power On Initialization
6.5
Register Map – I2C-Addressable
6.5.1
Interrupt Register
6.5.2
Interrupt Enable Register
6.5.3
Power Event Register
6.5.4
Detection Event Register
6.5.5
Fault Event Register
6.5.6
Start/ILIM Event Register
6.5.7
Supply Event Register
6.5.8
Port n Status Register
6.5.8.1
Port 1 Status Register
6.5.8.2
Port 2 Status Register
6.5.8.3
Port 3 Status Register
6.5.8.4
Port 4 Status Register
6.5.9
Power Status Register
6.5.10
I2C Slave Address Register
6.5.11
Operating Mode Register
6.5.12
Disconnect Enable Register
6.5.13
Detect/Class Enable Register
6.5.14
Port Power Priority Register
6.5.15
Timing Configuration Register
6.5.16
General Mask 1 Register
6.5.17
Detect/Class Restart Register
6.5.18
Power Enable Register
6.5.19
Reset Register
6.5.20
Legacy Detect Mode Register
6.5.21
Two-Event Classification Register
6.5.22
Interrupt Timer Register
6.5.23
Disconnect Threshold Register
6.5.23.1
Bits Description
6.5.24
ICUTnm CONFIG Register
6.5.24.1
ICUT21 CONFIG Register
6.5.24.2
ICUT43 CONFIG Register
6.5.24.3
Bits Description
6.5.25
Temperature Register
6.5.26
Input Voltage Register
6.5.27
Port n Current Register
6.5.27.1
Port 1 Current Register
6.5.27.2
Port 2 Current Register
6.5.27.3
Port 3 Current Register
6.5.27.4
Port 4 Current Register
6.5.28
Port n Voltage Register
6.5.28.1
Port 1 Voltage Register
6.5.28.2
Port 2 Voltage Register
6.5.28.3
Port 3 Voltage Register
6.5.28.4
Port 4 Voltage Register
6.5.29
PoE Plus Register
6.5.30
Firmware Revision Register
6.5.31
I2C Watchdog Register
6.5.32
Device ID Register
6.5.33
Cool Down/Gate Drive Register
6.5.34
Port n Detect Resistance Register
6.5.34.1
Port 1 Detect Resistance Register
6.5.34.1.1
Port 2 Detect Resistance Register
6.5.34.1.2
Port 3 Detect Resistance Register
6.5.34.1.3
Port 4 Detect Resistance Register
6.5.35
Port n Detect Voltage Difference Register
6.5.35.1
Port 1 Detect Voltage Difference Register
6.5.35.2
Port 2 Detect Voltage Difference Register
6.5.35.3
Port 3 Detect Voltage Difference Register
6.5.35.4
Port 4 Detect Voltage Difference Register
6.5.36
Reserved Registers
7
Application and Implementation
7.1
Introduction to PoE
7.2
Application Information
7.2.1
Kelvin Current Sensing Resistor
7.2.2
Connections on Unused Ports
7.3
Typical Application
7.3.1
Two Port, Auto Mode Application with External Port Reset
7.3.1.1
Design Requirements
7.3.2
Four Port, Auto Mode Application
7.3.2.1
Design Requirements
7.3.3
Eight Port, Semi-Auto Mode Application Using MSP430 Micro-Controller
7.3.3.1
Design Requirements
7.3.4
Detailed Design Procedure
7.3.4.1
Power Pin Bypass Capacitors
7.3.4.2
Per Port Components
7.3.4.3
System Level Components (not shown in the schematic diagrams)
7.3.5
Application Curves
7.4
System Examples
7.4.1
Overcurrent and Overload Protection
7.4.2
Inrush Protection
7.4.3
ICUT Current Limit
7.4.4
Foldback Protection (ILIM)
7.4.5
Kelvin Current Sensing Resistor
7.5
Power Supply Recommendations
7.5.1
VDD
7.5.2
VPWR
7.5.3
VPWR-RESET Sequencing
7.6
Layout
7.6.1
Layout Guidelines
7.6.1.1
Port Current Kelvin Sensing
7.6.2
Layout Example
7.6.2.1
Component Placement and Routing Guidelines
7.6.2.1.1
Power Pin Bypass Capacitors
7.6.2.1.2
Per-Port Components
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|28
MPDS364
Thermal pad, mechanical data (Package|Pins)