SLUSBX9I March 2014 – July 2019 TPS23861
The voltage on the RESET pin (VRESET ) should be kept below 0.9 V until VVPWR exceeds VUVLOPW_R. If VDD is turned ON after VVPWR exceeds VUVLOPW_R then no delay for RESET is required. If VDD is ON before VVPWR exceeds VUVLOPW_R then a delay for RESET is required. This delay can be provided by the system host or with a capacitor (CRST) connected to the RESET pin using the internal (50 kΩ typical) or external pullup resistor.
For the schematic diagrams shown in Figure 36, Figure 46, Figure 48, Figure 49, and Figure 50, the VDD power supply is turned on after the VPWR power supply exceeds VUVLOPW_R. More detail regarding TPS23861 power-on sequencing can be obtained by referring to the application note, TPS23861 Power-On Considerations, SLVA723.