SLVSF02D March 2019 – May 2020 TPS23881
COMMAND = 14h with 1 Data Byte, Read/Write
During tOVLD, tLIM or tSTART cool down cycle, any Detect/Class Enable command for that channel will be delayed until end of cool-down period. Note that at the end of cool down cycle, one or more detection/class cycles are automatically restarted as described previously, if the class and/or detect enable bits are set.
|LEGEND: R/W = Read/Write; R = Read only; -n = value after reset|
|7–4||CLE4-CLE1||R/W||0||Classification enable bits.|
|3–0||DETE4-DETE1||R/W||0||Detection enable bits.|
Detection and classification enable for each channel.
When in Manual mode, setting a bit means that only one cycle (detection or classification) is performed for the corresponding channel. The bit is automatically cleared by the time the cycle has been completed.
Note that similar result can be obtained by writing to the Detect/Class Restart register 0x18.
It is also cleared if a turn off (Power Enable register) command is issued.
When in semiauto mode, as long as the port is kept off, detection and classification are performed continuously, as long as the class and detect enable bits are kept set, but the class will be done only if the detection was valid. A Detect/Class Restart PB command can also be used to set the CLEn and DETEn bits, if in semiauto mode.
For 4-pair wired Ports in Semi-Auto or Auto mode, both DETEn and CLEn bits need to be set on both channels in order for Detection or Classification to be enabled
In Manual/Diagnostic mode, it is recommenced that a Port Reset command (see register 0x1A RESET Register) be completed prior to enabling discovery (DETEn or CLEn).